Semiconductor element and method for manufacturing the same

• US 9,530,872 B2
• Filed: 01/02/2014
• Issued: 12/27/2016
• Est. Priority Date: 09/24/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Sakata, Junichiro, Miyanaga, Akiharu, Sakakura, Masayuki, Koezuka, Junichi, Maruyama, Tetsunori, Imoto, Yuki
• Primary Examiner(s): Crawford, Latanya N
• Application Number:
  US14/146,093
• Publication Number:
  US 20140113407A1
• Time in Patent Office: 1,090 Days
• Field of Search: 438/104
• US Class Current: 1/1
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

An object is to provide a thin film transistor and a method for manufacturing the thin film transistor including an oxide semiconductor with a controlled threshold voltage, high operation speed, a relatively easy manufacturing process, and sufficient reliability. An impurity having influence on carrier concentration in the oxide semiconductor layer, such as a hydrogen atom or a compound containing a hydrogen atom such as H₂O, may be eliminated. An oxide insulating layer containing a large number of defects such as dangling bonds may be formed in contact with the oxide semiconductor layer, such that the impurity diffuses into the oxide insulating layer and the impurity concentration in the oxide semiconductor layer is reduced. The oxide semiconductor layer or the oxide insulating layer in contact with the oxide semiconductor layer may be formed in a deposition chamber which is evacuated with use of a cryopump whereby the impurity concentration is reduced.

Claims

1. A method for manufacturing a semiconductor element comprising the steps of:

forming a gate electrode over a substrate;

forming a gate insulating layer over the gate electrode;

performing a first heat treatment on the substrate at a temperature lower than or equal to 600°

C. after forming the gate insulating layer;

forming an oxide semiconductor layer over the gate insulating layer by a sputtering method using a target and a pulse direct-current power supply while the substrate is heated at a temperature higher than or equal to 100°

C. and lower than or equal to 600°

C., wherein a relative density of the target is more than or equal to 90% and less than or equal to 100%; and

forming an oxide insulating layer over the oxide semiconductor layer, wherein a part of the oxide insulating layer is in contact with the oxide semiconductor layer, and

wherein a hydrogen concentration peak exists in an interface between the oxide semiconductor layer and the part of the oxide insulating layer.

2. The method for manufacturing a semiconductor element according to claim 1, further comprising the step of forming a source electrode and a drain electrode so as to be electrically connected to the oxide semiconductor layer.

3. The method for manufacturing a semiconductor element according to claim 1, further comprising the step of performing a second heat treatment on the substrate at a temperature lower than or equal to 750°

C. after forming the oxide semiconductor layer.

4. The method for manufacturing a semiconductor element according to claim 1, further comprising the step of forming a protective insulating layer over the oxide insulating layer,

wherein the protective insulating layer contains nitrogen.

5. The method for manufacturing a semiconductor element according to claim 1, wherein the oxide semiconductor layer contains indium, gallium, and zinc.

6. The method for manufacturing a semiconductor element according to claim 1, wherein a hydrogen concentration in the part of the oxide semiconductor layer is more than or equal to 1×

10¹⁸ cm<sup>−

3</sup> and less than or equal to 2×

10²⁰ cm<sup>−

3</sup>.

7. The method for manufacturing a semiconductor element according to claim 1, wherein the oxide insulating layer is formed by a sputtering method using a silicon target.

8. The method for manufacturing a semiconductor element according to claim 1, wherein the oxide semiconductor layer is formed without being exposed to air after performing the first heat treatment.

9. A method for manufacturing a semiconductor element comprising the steps of:

forming a gate electrode over a substrate;

forming a first wiring over the substrate;

forming a first insulating layer over the gate electrode and the first wiring;

performing a first heat treatment on the substrate at a temperature lower than or equal to 600°

C. after forming the first insulating layer;

forming an oxide semiconductor layer over the first insulating layer by a sputtering method using a target and a pulse direct-current power supply while the substrate is heated at a temperature higher than or equal to 100°

C. and lower than or equal to 600°

C., wherein a relative density of the target is more than or equal to 90% and less than or equal to 100%;

forming a source electrode and a drain electrode over the oxide semiconductor layer, wherein the source electrode and the drain electrode are electrically connected to the oxide semiconductor layer;

forming a second wiring over the first insulating layer, wherein the second wiring is electrically connected to the first wiring through an opening portion in the first insulating layer; and

forming a second insulating layer over the oxide semiconductor layer, wherein at least a part of the second insulating layer is in contact with the oxide semiconductor layer,

wherein the gate electrode and the first wiring are formed at the same time,

wherein the source electrode, the drain electrode, and the second wiring are formed at the same time, and

wherein a hydrogen concentration peak exists in an interface between the oxide semiconductor layer and the part of the second insulating layer.

10. The method for manufacturing a semiconductor element according to claim 9, further comprising the step of performing a second heat treatment on the substrate at a temperature lower than or equal to 750°

C. after forming the oxide semiconductor layer.

11. The method for manufacturing a semiconductor element according to claim 9, further comprising the step of forming a third insulating layer over the second insulating layer,

wherein the third insulating layer contains nitrogen.

12. The method for manufacturing a semiconductor element according to claim 9, wherein the oxide semiconductor layer contains indium, gallium, and zinc.

13. The method for manufacturing a semiconductor element according to claim 9, wherein a hydrogen concentration in the part of the oxide semiconductor layer is more than or equal to 1×

10¹⁸ cm<sup>−

3</sup> and less than or equal to 2×

10²⁰ cm<sup>−

3</sup>.

14. The method for manufacturing a semiconductor element according to claim 9, wherein the second insulating layer is formed by a sputtering method using a silicon target.

15. The method for manufacturing a semiconductor element according to claim 9, wherein the oxide semiconductor layer is formed without being exposed to air after performing the first heat treatment.