Semiconductor device

• US 9,530,894 B2
• Filed: 02/05/2015
• Issued: 12/27/2016
• Est. Priority Date: 02/07/2014
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Koezuka, Junichi, Jintyou, Masami, Shima, Yukinori, Kurosaki, Daisuke, Nakada, Masataka, Yamazaki, Shunpei
• Primary Examiner(s): Tran, Tony
• Application Number:
  US14/615,031
• Publication Number:
  US 20150228799A1
• Time in Patent Office: 691 Days
• US Class Current: 1/1
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1237 with a different composition, shape, layout or thickness of the gate insulator in different devices
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1251 comprising TFTs having a different architecture, e.g. top- and bottom gate TFTs
• CPC Class Codes: H01L 29/78603 characterised by the insulating substrate or support H01L29/78657 takes precedence
• CPC Class Codes: H01L 29/78645 with multiple gate
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

A semiconductor device including an oxide semiconductor in which on-state current is high is provided. The semiconductor device includes a first transistor provided in a driver circuit portion and a second transistor provided in a pixel portion; the first transistor and the second transistor have different structures. Furthermore, the first transistor and the second transistor are transistors having a top-gate structure. In an oxide semiconductor film of each of the transistors, an impurity element is contained in regions which do not overlap with a gate electrode. The regions of the oxide semiconductor film which contain the impurity element function as low-resistance regions. Furthermore, the regions of the oxide semiconductor film which contain the impurity element are in contact with a film containing hydrogen. The first transistor provided in the driver circuit portion includes two gate electrodes between which the oxide semiconductor film is provided.

Claims

1. A semiconductor device comprising a first transistor and a second transistor over an insulating surface,

wherein the first transistor includes:

a first gate electrode over the insulating surface;

a first insulating film over the first gate electrode;

a first oxide semiconductor film over the first insulating film;

a second insulating film over the first oxide semiconductor film; and

a second gate electrode overlapping with the first oxide semiconductor film with the second insulating film positioned therebetween,

wherein the first oxide semiconductor film includes a first region overlapping with the first gate electrode and a second region in direct contact with a nitride insulating film,

wherein the second region of the first oxide semiconductor film is in direct contact with a first conductive film through a first opening in the nitride insulating film, and

wherein a cross-section of a channel formation region taken along a channel width direction of the first transistor shows that the first gate electrode and the second gate electrode are connected to each other through an opening in the first insulating film and the second insulating film,

wherein the second transistor includes;

a second oxide semiconductor film over the first insulating film;

a third insulating film over the second oxide semiconductor film; and

a third gate electrode overlapping with the second oxide semiconductor film with the third insulating film positioned therebetween,

wherein the second oxide semiconductor film includes a first region overlapping with the third gate electrode and a second region in direct contact with the nitride insulating film, and

wherein the second region of the second oxide semiconductor film is in direct contact with a second conductive film through a second opening in the nitride insulating film,

wherein the first region and the second region have different impurity element concentrations in each of the first oxide semiconductor film and the second oxide semiconductor film, and

wherein the nitride insulating film is on and in contact with the second gate electrode, a side surface of the second insulating film, the third gate electrode, and a side surface of the third insulating film.

2. The semiconductor device according to claim 1, wherein an atomic ratio of metal elements contained in the first region of the second oxide semiconductor film is different from an atomic ratio of metal elements contained in the first region of the first oxide semiconductor film.

3. The semiconductor device according to claim 1, wherein the impurity element is at least one of hydrogen, boron, carbon, nitrogen, fluorine, aluminum, silicon, phosphorus, chlorine, and a rare gas element.

4. The semiconductor device according to claim 1,

wherein in the first oxide semiconductor film, an impurity element concentration of the second region is higher than an impurity element concentration of the first region, being higher than or equal to 1×

10¹⁸ atoms/cm³ and lower than or equal to 1×

10²² atoms/cm³, and

wherein in the second oxide semiconductor film, an impurity element concentration of the second region is higher than an impurity element concentration of the first region, being higher than or equal to 1×

10¹⁸ atoms/cm³ and lower than or equal to 1×

10²² atoms/cm³.

5. The semiconductor device according to claim 1, wherein the first insulating film includes an oxide insulating film from which oxygen is released by heating.

6. The semiconductor device according to claim 1, wherein a channel length of the first transistor is greater than or equal to 1.45 μ

m and less than or equal to 2.2 μ

m.

7. The semiconductor device according to claim 1, wherein the first transistor is in a driver circuit portion and the second transistor is in a pixel portion.

8. A semiconductor device comprising a first transistor and a second transistor over an insulating surface,

wherein the first transistor includes:

a first gate electrode over the insulating surface;

a first insulating film over the first gate electrode;

a first oxide semiconductor film over the first insulating film;

a second insulating film over the first oxide semiconductor film; and

a second gate electrode overlapping with the first oxide semiconductor film with the second insulating film positioned therebetween,

wherein the first oxide semiconductor film includes a first region overlapping with the first gate electrode and a second region in direct contact with a nitride insulating film,

wherein the second region of the first oxide semiconductor film is in direct contact with a first conductive film through a first opening in the nitride insulating film, and

wherein a cross-section of a channel formation region taken along a channel width direction of the first transistor shows that the first gate electrode and the second gate electrode are connected to each other through an opening in the first insulating film and the second insulating film,

wherein the second transistor includes;

a second oxide semiconductor film over the first insulating film;

a third insulating film over the second oxide semiconductor film; and

a third gate electrode overlapping with the second oxide semiconductor film with the third insulating film positioned therebetween,

wherein the second oxide semiconductor film includes a first region overlapping with the third gate electrode and a second region in direct contact with the nitride insulating film, and

wherein the second region of the second oxide semiconductor film is in direct contact with a second conductive film through a second opening in the nitride insulating film,

wherein the first region and the second region have different impurity element concentrations in each of the first oxide semiconductor film and the second oxide semiconductor film,

wherein the first oxide semiconductor film has a multilayer structure including at least a first film and a second film,

wherein the first film and the second film have different atomic ratios of metal elements,

wherein the second oxide semiconductor film has a multilayer structure including at least a third film and a fourth film,

wherein the third film has the same atomic ratio of metal elements as the first film and the fourth film has the same atomic ratio of metal elements as the second film, and

wherein the nitride insulating film is on and in contact with the second gate electrode, a side surface of the second insulating film, the third gate electrode, and a side surface of the third insulating film.

9. The semiconductor device according to claim 8,

wherein the second film covers a top surface and a side surface of the first film in the first oxide semiconductor film, and

wherein the fourth film covers a top surface and a side surface of the third film in the second oxide semiconductor film.

10. The semiconductor device according to claim 8, wherein the impurity element is at least one of hydrogen, boron, carbon, nitrogen, fluorine, aluminum, silicon, phosphorus, chlorine, and a rare gas element.

11. The semiconductor device according to claim 8,

wherein in the first oxide semiconductor film, an impurity element concentration of the second region is higher than an impurity element concentration of the first region, being higher than or equal to 1×

10¹⁸ atoms/cm³ and lower than or equal to 1×

10²² atoms/cm³, and

wherein in the second oxide semiconductor film, an impurity element concentration of the second region is higher than an impurity element concentration of the first region, being higher than or equal to 1×

10¹⁸ atoms/cm³ and lower than or equal to 1×

10²² atoms/cm³.

12. The semiconductor device according to claim 8, wherein the first insulating film includes an oxide insulating film from which oxygen is released by heating.

13. The semiconductor device according to claim 8, wherein a channel length of the first transistor is greater than or equal to 1.45 μ

m and less than or equal to 2.2 μ

m.

14. The semiconductor device according to claim 8, wherein the first transistor is in a driver circuit portion and the second transistor is in a pixel portion.

15. A semiconductor device comprising:

a first transistor and a second transistor over an insulating surface;

a first insulating film; and

a nitride insulating film;

wherein the first transistor includes;

a first gate electrode over the insulating surface;

the first insulating film over the first gate electrode;

a first oxide semiconductor film over the first insulating film;

a second insulating film over the first oxide semiconductor film; and

a second gate electrode overlapping with the first oxide semiconductor film with the second insulating film positioned therebetween,

wherein the first oxide semiconductor film includes a first region overlapping with the first gate electrode and a second region in direct contact with the nitride insulating film,

wherein the second region of the first oxide semiconductor film is in direct contact with a first conductive film through a first opening in the nitride insulating film,

wherein a cross-section of a channel formation region taken along a channel width direction of the first transistor shows that the first gate electrode and the second gate electrode are electrically connected to each other through an opening in the first insulating film and the second insulating film,

wherein the second transistor includes;

a second oxide semiconductor film over the first insulating film;

a third insulating film over the second oxide semiconductor film; and

a third gate electrode overlapping with the second oxide semiconductor film with the third insulating film positioned therebetween,

wherein the second oxide semiconductor film includes a first region overlapping with the third gate electrode and a second region in direct contact with the nitride insulating film, and

wherein the second region of the second oxide semiconductor film is in direct contact with a second conductive film through a second opening in the nitride insulating film,

wherein the nitride insulating film is on and in contact with the second gate electrode and a side surface of the second insulating film, the third gate electrode, and a side surface of the third insulating film.

16. The semiconductor device according to claim 15, wherein the first transistor is in a driver circuit portion and the second transistor is in a pixel portion.

17. The semiconductor device according to claim 15,

wherein in the first oxide semiconductor film, an impurity element concentration of the second region is higher than an impurity element concentration of the first region, being higher than or equal to 1×

10¹⁸ atoms/cm³ and lower than or equal to 1×

10²² atoms/cm³, and

wherein in the second oxide semiconductor film, an impurity element concentration of the second region is higher than an impurity element concentration of the first region, being higher than or equal to 1×

10¹⁸ atoms/cm³ and lower than or equal to 1×

10²² atoms/cm³.