Isolation device and system

• US 9,531,280 B2
• Filed: 05/09/2014
• Issued: 12/27/2016
• Est. Priority Date: 05/09/2014
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Inventors: Peng, Jia, Chow, Fun Kok, Wong, Chee Heng, Chang, Kwee Chong
• Primary Examiner(s): NGUYEN, MATTHEW VAN
• Application Number:
  US14/273,915
• Publication Number:
  US 20150323588A1
• Time in Patent Office: 963 Days
• US Class Current: 1/1
• CPC Class Codes: G01R 31/2836 Fault-finding or characterising G01R31/2822 - G01R31/2831 take precedence
• CPC Class Codes: H02H 3/24 responsive to undervoltage or no-voltage H02H3/207 takes precedence
• CPC Class Codes: H02M 1/0003 Details of control, feedback or regulation circuits
• CPC Class Codes: H02M 3/33507 with automatic control of the output voltage or current, e.g. flyback converters H02M3/33561, H02M3/33569 take precedence
• CPC Class Codes: H02M 3/33523 with galvanic isolation between input and output of both the power stage and the feedback loop
• CPC Class Codes: H05B 45/3725 Switched mode power supply [SMPS]
• CPC Class Codes: H05B 45/382 with galvanic isolation between input and output
• CPC Class Codes: H05B 47/10 Controlling the light source
• CPC Class Codes: H05B 47/20 Responsive to malfunctions or to light source life; for protection
• CPC Class Codes: H05B 47/24 Circuit arrangements for protecting against overvoltage
• CPC Class Codes: H05B 47/28 Circuit arrangements for protecting against abnormal temperature

Abstract

An isolation device having first and second semiconductor is disclosed. The first semiconductor die may be adapted to transmit a first signal to the second semiconductor die that is electrically isolated. The first semiconductor die may have a transmitter coupled to a modulator that modulates the first signal. The second semiconductor die may have a receiver having a counter and a control circuit. The control circuit may be adapted to determine an indication of the first signal by using the counter. In addition, an isolation system and a DC-DC feedback regulation control system having such control circuit are disclosed. Likewise, a method for conveying a first signal across an isolation barrier is disclosed. The method may comprise counting a received signal based on internal clock and determining an indication of the first signal from the counter'"'"'s count value.

Claims

1. An isolation device, comprising:

a first semiconductor die;

a second semiconductor die formed adjacent to but electrically isolated from the first semiconductor die;

a modulator, the modulator configured to modulate a first signal into a modulated pulse signal;

a transmitter configured to transmit the modulated pulse signal from the first semiconductor die to the second semiconductor die, wherein the transmitter and the modulator reside within the first semiconductor die;

a detector configured to receive the modulated pulse signal and, in response thereto, generate a received modulated pulse signal as output to the detector;

a counter coupled to the detector, the counter configured to count in accordance to a pulse length of the received modulated pulse signal; and

a control circuit configured to determine an indication of the first signal by using the counter.

2. The isolation device of claim 1 further comprising a start-up circuit configured to generate a power up signal, wherein the control circuit is configured to stop determining the indication of the first signal when the power up signal is activated.

3. The isolation device of claim 1, wherein the control circuit is configured to operate in a normal mode if the counter value is within a first count range exceeding a first predetermined value, wherein the control circuit is configured to continuously monitoring the first signal.

4. The isolation device of claim 3, wherein the control circuit is configured to operate in a first fault mode if the counter value exceeds at least two times the first predetermined value, wherein in the first fault mode, the control circuit is configured to control the isolation device such that the first signal is restored to a predetermined range.

5. The isolation device of claim 4, wherein the control circuit is configured to operate in a second fault mode if the counter value is less than approximately half of the first predetermined value, wherein in the second fault mode, the control circuit is configured to control the isolation device such that the first signal is restored to the predetermined range.

6. The isolation device of claim 1, wherein the counter is configured to start counting when the received modulated pulse signal is in a first predetermined state, and configured to stop counting when the received modulated pulse signal is in a second predetermined state, and wherein the counter is configured to generate a count value that is representative of the pulse length.

7. The isolation device of claim 6, wherein the counter is configured to count for a first predetermined time period after the received modulated pulse signal is configured to transition from the first predetermined state to the second predetermined state.

8. The isolation device of claim 7, wherein the counter is configured to continue counting when the received modulated pulse signal is configured to transition from the second predetermined state to the first predetermined state during the first predetermined time period.

9. The isolation device of claim 1, wherein the second semiconductor die is configured to be coupled to a power supply, and wherein the isolation device comprises a power monitor circuit configured to generate a voltage range signal that is indicative of whether the power supply is in a predetermined range.

10. The isolation device of claim 9 further comprising a fault detection circuit configured to determine a faulty condition of the first semiconductor die, wherein the fault detection circuit is configured to generate a first fault signal if the detector fails to receive the modulated pulse signal when the voltage range signal indicates that the power supply is in the predetermined range.

11. The isolation device of claim 9 further comprising:

a fault detection circuit, wherein the fault detection circuit is configured to generate a second fault signal if the detector fails to receive the modulated pulse signal for a second predetermined time period after the voltage range signal is triggered; and

a power controller configured to control the power supply to the first semiconductor die, wherein the power controller is configured to cut off the power supply to the first semiconductor die when the second fault signal is triggered.

12. An isolation system that isolates a first circuit from a second circuit with an isolation barrier, the isolation system comprising:

a first clock generator provided within the first circuit, the first clock generator configured to generate a first clock signal;

a mixer configured to modulate a first signal into a modulated signal using the first clock signal;

a transmitter configured to transmit the modulated signal from the first circuit to the second circuit across the isolation barrier;

a second clock generator provided within the second circuit, the second clock generator configured to generate a second clock signal;

a receiver coupled to the second clock generator, the receiver configured to receive the modulated signal from the transmitter;

a counter configured to count the second clock signal in accordance with the modulated signal; and

a control circuit configured to determine an indication of the first signal corresponding to a count value of the counter.

13. The isolation system of claim 12, wherein the counter is configured to count for a first predetermined time period after the modulated signal transitions from a first predetermined state to a second predetermined state.

14. The isolation system of claim 13 further comprising a start-up circuit configured to generate a power-up signal for a second predetermined time period when at least a portion of the second circuit is powered up.

15. The isolation system of claim 14, wherein the control circuit is configured to determine the indication of the first signal when the power-up signal is in the second predetermined state different from the first predetermined state.

16. The isolation system of claim 12, wherein the mixer is configured to modulate an additional analog signal, and wherein the isolation system further comprises a charge pump circuit configured to reconstruct the additional analog signal.

17. The isolation system of claim 16, wherein the control circuit is configured to reconstruct the first signal in accordance to the counter.

18. The isolation system of claim 12, wherein the isolation system forms a portion of a direct current to direct current (DC-DC) feedback regulation system.

19. The isolation system of claim 12, wherein the isolation system forms a portion of a solid-state lighting system.

20. A direct current to direct current converter (DC-DC) feedback regulation control system comprising:

a first circuit;

an isolation barrier;

a second circuit electrically isolated from the first circuit via the isolation barrier;

a power controller of the second circuit;

an isolation transformer configured to receive a current from the second circuit via the power controller, and configured to provide an output voltage therefrom to the first circuit across the isolation barrier;

a power monitoring circuit of the first circuit configured to generate a first signal;

a modulator configured to modulate the first signal into a modulated pulse signal;

a transmitter configured to transmit the modulated pulse signal from the first circuit to the second circuit through the isolation barrier;

a receiver configured to receive the modulated pulse signal into a received modulated pulse signal;

a counter coupled to the receiver, the counter configured to count in accordance to a pulse length of the received modulated pulse signal; and

a control circuit configured to determine an indication of the power monitoring circuit by using the counter.