Fast response pulse width modulation control for switching regulator

• US 9,535,438 B2
• Filed: 07/10/2014
• Issued: 01/03/2017
• Est. Priority Date: 07/10/2014
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Inventors: Yuan, Henry H., Chi, Steve X., Bhuiyan, Ekram H.
• Primary Examiner(s): Berhane, Adolf
• Assistant Examiner(s): Quddus, Nusrat
• Application Number:
  US14/328,368
• Publication Number:
  US 20160011611A1
• Time in Patent Office: 908 Days
• Field of Search: 323271-289, 323/351
• US Class Current: 1/1
• CPC Class Codes: G05F 1/46 wherein the variable actually regulated by the final control device is dc G05F1/625 takes precedence
• CPC Class Codes: G05F 1/575 characterised by the feedback circuit
• CPC Class Codes: H02M 1/0025 Arrangements for modifying reference values, feedback values or error values in the control loop of a converter
• CPC Class Codes: H02M 3/156 with automatic control of output voltage or current, e.g. switching regulators

Abstract

A switching rectifier circuit includes a pulse width modulation controller, a voltage switching circuit, a pulse width modulation comparator, an error amplifier, a voltage reference, a high threshold voltage comparator and a low threshold voltage comparator. A varying output voltage of the voltage regulator is sampled and compared to a high threshold voltage reference and a low threshold voltage reference. When the sampled output voltage is equal to or greater than the high threshold voltage reference the output voltage is decreased. When the sampled output voltage is equal to or less than the low threshold voltage reference the output voltage is increased.

Claims

1. A switching rectifier circuit comprising:

a voltage input coupled to a positive amplification device and a negative amplification device, the positive amplification device and the negative amplification device coupled in series;

a voltage output node on a common output of the positive amplification device and the negative amplification device;

a pulse width modulation controller coupled to the positive amplification device and the negative amplification device, the pulse width modulation controller including a set input and a reset input;

a voltage switching circuit having a voltage switching circuit output and a clock signal input;

a pulse width modulation comparator coupled between the voltage switching circuit output and the pulse width modulation controller;

an error amplifier having an error amplifier output coupled to the pulse width modulation comparator;

a voltage reference having an output coupled to the error amplifier;

a high threshold voltage comparator including;

a high threshold voltage reference;

a first high threshold voltage comparator input coupled to the high threshold voltage reference;

a second high threshold voltage comparator input coupled to the output voltage; and

a high threshold voltage comparator output coupled to the pulse width modulation controller reset input;

a low threshold voltage comparator including;

a low threshold voltage reference;

a first low threshold voltage comparator input coupled to the low threshold voltage reference;

a second low threshold voltage comparator input coupled to the output voltage; and

a low threshold voltage comparator output coupled to the pulse width modulation controller set input.

2. The switching rectifier circuit of claim 1, wherein the high threshold voltage comparator further includes an immediate reset pulse generator having an immediate reset pulse generator input coupled to an output of a comparison of the high threshold voltage reference and the feedback voltage divider output.

3. The switching rectifier circuit of claim 1, wherein the low threshold voltage comparator further includes an immediate set pulse generator having an immediate set pulse generator input coupled to an output of a comparison of the low threshold voltage reference and the feedback voltage divider output.

4. The switching rectifier circuit of claim 1, further comprising:

a current switching circuit;

a summation circuit coupled between the voltage switching circuit output and the pulse width modulation comparator, the summation circuit including;

a first summation circuit input coupled to the voltage switching circuit output; and

a second summation circuit input coupled to the current switching circuit.

5. The switching rectifier circuit of claim 4, wherein the summation circuit further includes an increase pulse width modulation ramp input coupled to a comparison of the high threshold voltage reference and the feedback voltage divider output.

6. The switching rectifier circuit of claim 4, wherein the summation circuit further includes a decrease pulse width modulation ramp input coupled to a comparison of the low threshold voltage reference and the feedback voltage divider output.

7. The switching rectifier circuit of claim 1, wherein the pulse width modulation controller includes:

a first pulse width modulation controller output coupled to the positive amplification device;

a second pulse width modulation controller output coupled to the negative amplification device; and

a pulse width modulation controller input.

8. A method of regulating a voltage comprising:

sampling a varying output voltage of the voltage regulator;

comparing the sampled output voltage to a high threshold voltage reference;

decreasing the output voltage of the voltage regulator when the sampled output voltage is equal to or greater than the high threshold voltage reference wherein decreasing the output voltage includes increasing a pulse width modulating ramp signal; and

increasing the output voltage of the voltage regulator when the sampled output voltage is equal to or less than the low threshold voltage reference wherein increasing the output voltage includes decreasing the pulse width modulating ramp signal.

9. The method of claim 8, wherein sampling the output voltage includes dividing the output voltage in a feedback voltage divider.

10. The method of claim 8, wherein increasing the increasing pulse width modulating ramp signal and the decreasing pulse width modulating ramp signal are combined in a summation circuit to modify a pulse width modulation ramp signal to form a combined pulse width modulation ramp signal.

11. The method of claim 8, wherein decreasing the output voltage includes decreasing a duty cycle of the voltage regulator.

12. The method of claim 10, further comprising inputting the combined pulse width modulation ramp signal and a pulse width modulator control signal in a pulse width modulation comparator to produce a control input to the pulse width modulation control.

13. The method of claim 8, wherein increasing the output voltage includes increasing a duty cycle of the voltage regulator.

14. A switching regulator circuit comprising:

a pulse width modulation controller having a high control input and a low control input;

a high threshold voltage comparator circuit having a first output coupled to the high control input, the high threshold voltage comparator circuit configured to compare a high threshold voltage reference and an output voltage of the switching regulator and output a reset signal to the high control input of the pulse width modulation controller when the output voltage is equal to or greater than the high threshold voltage reference wherein the set signal includes increasing a pulse width modulating ramp signal; and

a low threshold voltage comparator circuit having a second output coupled to the low control input, the low threshold voltage comparator circuit configured to compare a low threshold voltage reference and the output voltage and output a set signal to the low control input of the pulse width modulation controller when the output voltage is equal to or less than the low threshold voltage reference wherein the reset signal includes decreasing the pulse width modulating ramp signal.

15. The circuit of claim 14, wherein the high threshold voltage comparator circuit includes an immediate reset pulse generator configured to immediately generate the reset signal when the output voltage is equal to or greater than the high threshold voltage reference.

16. The circuit of claim 15, wherein the pulse width modulation controller is configured to decrease a duty cycle of the switching regulator in response to the output reset signal from the high threshold voltage comparator circuit, independent from a switching frequency of the switching regulator.

17. The circuit of claim 16, wherein decreasing the duty cycle of the switching regulator decreases the output voltage of the switching regulator.

18. The circuit of claim 14, wherein the low threshold voltage comparator circuit includes an immediate set pulse generator configured to immediately generate the set signal when the output voltage is equal to or less than the low threshold voltage reference.

19. The circuit of claim 18, wherein the pulse width modulation controller is configured to increase a duty cycle of the switching regulator in response to the output set signal from the low threshold voltage comparator circuit, independent from the switching frequency of the switching regulator.

20. The circuit of claim 18, wherein increasing the duty cycle of the switching regulator increases the output voltage.