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Multi-core microprocessor that dynamically designates one of its processing cores as the bootstrap processor

  • US 9,535,488 B2
  • Filed: 05/19/2014
  • Issued: 01/03/2017
  • Est. Priority Date: 08/28/2013
  • Status: Active Grant
First Claim
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1. A microprocessor, comprising:

  • an indicator; and

    a plurality of processing cores;

    wherein each of the plurality of processing cores is configured to sample the indicator;

    wherein when the indicator indicates a first predetermined value, the plurality of processing cores are configured to collectively designate a default one of the plurality of processing cores to be a bootstrap processor;

    wherein when the indicator indicates a second predetermined value distinct from the first predetermined value, the plurality of processing cores are configured to collectively designate one of the plurality of processing cores other than the default processing core to be the bootstrap processor; and

    wherein the designated bootstrap processor fetches instructions at an architecturally-defined reset vector and executes the instructions.

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