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Systems and methods for reducing standby power in floating body memory devices

  • US 9,536,595 B2
  • Filed: 01/29/2016
  • Issued: 01/03/2017
  • Est. Priority Date: 07/10/2013
  • Status: Active Grant
First Claim
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1. A method of reducing standby power for a floating body memory array having a plurality of floating body memory cells configured with DNWell nodes that can be powered to maintain a high potential in the floating body by a vertical bipolar holding mechanism, said method comprising:

  • performing at least one of;

    periodically pulsing a source line of the array;

    periodically pulsing a bit line of the array;

    periodically floating the source line;

    or periodically floating the bit line;

    wherein said periodically pulsing comprises cyclically applying a pulse of positive voltage to said source line or bit line to turn off the vertical bipolar holding mechanism; and

    removing said positive voltage between said pulses to turn on said vertical bipolar holding mechanism.

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