Semiconductor device comprising a field electrode

• US 9,536,960 B2
• Filed: 06/24/2015
• Issued: 01/03/2017
• Est. Priority Date: 07/14/2014
• Status: Active Grant

• Current Assignee: Infineon Technologies Austria Ag (Infineon Technologies AG)
• Original Assignee: Infineon Technologies Austria Ag (Infineon Technologies AG)
• Inventors: Laforet, David, Hirler, Franz, Blank, Oliver, Siemieniec, Ralf
• Primary Examiner(s): Tran, Thien F
• Application Number:
  US14/748,712
• Publication Number:
  US 20160013280A1
• Time in Patent Office: 559 Days
• Field of Search: 257/330, 257/331, 257/340
• US Class Current: 1/1
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/402 Field plates
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/408 with an insulating layer with a particular dielectric or electrostatic property, e.g. with static charges or for controlling trapped charges or moving ions, or with a plate acting on the insulator potential or the insulator charges, e.g. for controlling charges effect or potential distribution in the insulating layer, or with a semi-insulating layer contacting directly the semiconductor surface
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/4238 characterised by the surface lay-out
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7802 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A semiconductor device includes a gate electrode adjacent to a body region in a semiconductor substrate. The semiconductor device further includes a field electrode in a field plate trench in the main surface, the field plate trench having an extension length in a first direction parallel to a main surface. The extension length is less than the double of an extension length in a second direction that is perpendicular to the first direction parallel to the main surface. The extension length in the first direction is more than half of the extension length in the second direction. The field electrode is insulated from an adjacent drift zone by means of a field dielectric layer. A field plate material of the field electrode has a resistivity in a range from 10⁵ to 10⁻¹ Ohm·cm.

Claims

1. A semiconductor device, comprising:

a gate electrode adjacent to a body region in a semiconductor substrate; and

a field electrode in a field plate trench in a main surface of the semiconductor substrate, the field plate trench having an extension length in a first direction parallel to the main surface, the extension length being less than the double of an extension length of the field electrode in a second direction that is perpendicular to the first direction and is parallel to the main surface, the extension length in the first direction being more than half of the extension length in the second direction, the field electrode being insulated from an adjacent drift zone by means of a field dielectric layer,

wherein a field plate material of the field electrode has a resistivity in a range from 10⁵ to 10<sup>−

1</sup> Ohm·

cm.

2. The semiconductor device according to claim 1, further comprising a source region adjacent to the main surface and a drain region adjacent to a back side surface opposing the main surface.

3. The semiconductor device according to claim 2, further comprising a source plate arranged over the field plate trench.

4. The semiconductor device according to claim 1, wherein the field plate material is selected from the group consisting of:

polysilicon doped at a doping concentration between 1E16 cm<sup>−

3</sup> and 1E19 cm<sup>−

3</sup>, semi-insulating polysilicon (SIPOS) and amorphous silicon carbide.

5. The semiconductor device according to claim 1,

wherein the gate electrode is disposed in a gate trench.

6. The semiconductor device according to claim 1,

wherein the gate electrode is a planar gate electrode disposed over the main surface of the semiconductor substrate.

7. A synchronous rectification device comprising the semiconductor device according to claim 1.

8. A power supply comprising the synchronous rectification device according to claim 7.

9. A semiconductor device comprising:

a gate electrode adjacent to a body region in a semiconductor substrate; and

a field electrode in a field plate trench in a main surface of the semiconductor substrate, the field plate trench extending at the main surface and being electrically coupled to a source terminal at a plurality of positions; and

a contact plug for electrically coupling the field electrode to a terminal,

the contact plug comprising a contact material having a resistivity in a range from 10⁵ to 10<sup>−

1</sup> Ohm·

cm.

10. The semiconductor device according to claim 9, wherein the field electrode comprises a field plate material having a resistivity less than 1E−

1 Ohm·

cm.

11. The semiconductor device according to claim 10, wherein the field plate material comprises a metal or doped polysilicon having a doping concentration of more than 1E20 cm⁻

3.

12. The semiconductor device according to claim 9, further comprising a source region adjacent to the main surface and a drain region adjacent to a back side surface opposing the main surface.

13. The semiconductor device according to claim 9, wherein the gate electrode is disposed in a gate trench and the gate trench and the field plate trench are merged to form a single trench.

14. The semiconductor device according to claim 9, wherein the contact material is selected from the group consisting of:

polysilicon doped at a doping concentration between 1E16 cm<sup>−

3</sup> and 1E19 cm<sup>−

3</sup>, semi-insulating polysilicon (SIPOS) and amorphous silicon carbide.

15. A semiconductor device comprising:

a gate electrode adjacent to a body region in a semiconductor substrate; and

a field electrode in a field plate trench in a main surface of the semiconductor substrate, the field plate trench having an extension length in a first direction, the extension length being less than the double of an extension length in a second direction that is parallel to the main surface and perpendicular to the first direction, the extension length in the first direction being more than half of the extension length in the second direction; and

a contact plug for electrically coupling the field electrode to a terminal,

the contact plug comprising a contact material having a resistivity between 10⁵ to 10<sup>−

1</sup> Ohm·

cm.

16. The semiconductor device according to claim 15, wherein the contact material is selected from the group consisting of:

polysilicon doped at a doping concentration between 1E16 cm<sup>−

3</sup> ad 1E19 cm<sup>−

3</sup>, semi-insulating polysilicon (SIPOS), and amorphous silicon carbide.