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Expositive flash memory control

  • US 9,542,118 B1
  • Filed: 10/12/2015
  • Issued: 01/10/2017
  • Est. Priority Date: 09/09/2014
  • Status: Active Grant
First Claim
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1. A flash memory device comprising:

  • a flash storage having a plurality of storage locations disposed within structural elements hierarchically arranged such that a structural element at each hierarchical level above a lowest level enables access to a respective subset of structural elements at each lower hierarchical level; and

    a memory controller that, upon receiving an incoming address value in association with a memory access command, generates a plurality of hierarchical sub-address values that correspond to groups of the structural elements at respective hierarchical levels, including generating at least one hierarchical sub-address, at least in part, through a modulo operation that returns a remainder of at least a portion of the incoming address value divided by a quantity of access-enabled structural elements at the respective hierarchical level to which the hierarchical sub-address corresponds, at least one of the hierarchical sub-address values being a virtual address.

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