Hardware for performing a database operation

• US 9,542,443 B2
• Filed: 05/11/2015
• Issued: 01/10/2017
• Est. Priority Date: 10/02/2012
• Status: Active Grant

• Current Assignee: Oracle International Corporation (Oracle Corporation)
• Original Assignee: Oracle International Corporation (Oracle Corporation)
• Inventors: Aingaran, Kathirgamar, Swart, Garret F, Kapil, Sanjiv
• Primary Examiner(s): NGUYEN, KIM T
• Application Number:
  US14/709,302
• Publication Number:
  US 20150261871A1
• Time in Patent Office: 610 Days
• Field of Search: 707/706, 707/713
• US Class Current: 1/1
• CPC Class Codes: G06F 12/0804 with main memory updating G06F12/0806 takes precedence
• CPC Class Codes: G06F 12/082 Associative directories G06F12/0822 takes precedence
• CPC Class Codes: G06F 12/12 Replacement control
• CPC Class Codes: G06F 12/1408 by using cryptography for digital transmission H04L9/00
• CPC Class Codes: G06F 12/1475 in a virtual system, e.g. with translation means
• CPC Class Codes: G06F 13/102 where the programme performs an interfacing function, e.g. device driver G06F13/105 takes precedence; scheduling within device drivers G06F9/52; contention policies within device drivers G06F9/4881
• CPC Class Codes: G06F 13/362 with centralised access control
• CPC Class Codes: G06F 13/4068 Electrical coupling
• CPC Class Codes: G06F 15/17331 Distributed shared memory [DSM], e.g. remote direct memory access [RDMA]
• CPC Class Codes: G06F 15/7889 Reconfigurable logic implemented as a co-processor instruction execution using a coprocessor G06F9/3877
• CPC Class Codes: G06F 16/2237 Vectors, bitmaps or matrices
• CPC Class Codes: G06F 16/2453 Query optimisation
• CPC Class Codes: G06F 16/24553 of query operations
• CPC Class Codes: G06F 16/24558 Binary matching operations
• CPC Class Codes: G06F 16/2456 Join operations
• CPC Class Codes: G06F 16/24561 Intermediate data storage techniques for performance improvement
• CPC Class Codes: G06F 16/24569 Query processing with adaptation to specific hardware, e.g. adapted for using GPUs or SSDs
• CPC Class Codes: G06F 16/273 Asynchronous replication or reconciliation
• CPC Class Codes: G06F 16/284 Relational databases
• CPC Class Codes: G06F 16/9535 Search customisation based on user profiles and personalisation
• CPC Class Codes: G06F 21/6209 : to a single file or object, e.g. in a secure envelope, encrypted and accessed using a key, or with access control rules appended to the object itself
• CPC Class Codes: G06F 9/30065 : Loop control instructions; iterative instructions, e.g. LOOP, REPEAT
• CPC Class Codes: G06F 9/381 : Loop buffering
• CPC Class Codes: G06F 9/3851 : from multiple instruction streams, e.g. multistreaming
• CPC Class Codes: G06F 9/3867 : using instruction pipelines
• CPC Class Codes: G06F 9/546 : Message passing systems or structures, e.g. queues
• CPC Class Codes: H04L 69/14 : Multichannel or multilink protocols
• CPC Class Codes: Y02D 10/00 : Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Techniques for processing a query are provided. One or more operations that are required to process a query are performed by a coprocessor that is separate from a general purpose microprocessor that executes query processing software. The query processing software receives a query, determines one or more operations that are required to be executed to fully process the query, and issues one or more commands to one or more coprocessors that are programmed to perform one of the operations, such as a table scan operation and/or a lookup operation. The query processing software obtains results from the coprocessor(s) and performs one or more additional operations thereon to generate a final result of the query.

Claims

1. A processing chip comprising:

a first hardware element that is configured to;

receive a query that includes a database operation;

generate, in response to receiving the query, a scan operation command that includes, as parameters of the scan operation command, address data that is used to identify input data and one or more values that are used to compare against the input data;

a second hardware element that is configured to;

read the scan operation command;

cause the input data to be read from a location that is indicated by the address data;

perform a comparison between the input data and the one or more values;

generate a result data based on the comparison;

cause the first hardware element to be notified of the result data.

2. The processing chip of claim 1, wherein the first hardware element is a general purpose microprocessor processing instructions that are based on code written in a high-level programming language.

3. The processing chip of claim 1, wherein the second hardware element is a coprocessor.

4. The processing chip of claim 1, wherein:

the scan operation command further includes operation type data that indicates a type of operation to perform;

the second hardware element is further configured to identify the operation type data to determine the type of operation.

5. The processing chip of claim 4, wherein the second hardware element is further configured to perform the steps of:

using the operation type data to determine logic that is used to interpret the input data;

converting the input data from a first data type to a second data type that is different than the first data type.

6. The processing chip of claim 1, wherein the scan operation command further includes destination data that indicates where the result data is to be stored.

7. The processing chip of claim 1, wherein causing the first hardware element to be notified of the result data comprises causing the result data to be stored in a cache of the first hardware element.

8. The processing chip of claim 1, wherein:

the input data comprises value data and count data;

an input value in the value data corresponds to data elements, the number of which is indicated by a count value in the count data;

performing the comparison between the input data and the one or more values comprises comparing the input value with the one or more values;

generating the result data comprises generating a result indication that indicates whether the input value satisfies the one or more values;

generating the result data is performed without comparing the input value with the one or more values a number of times indicated by the count value.

9. The processing chip of claim 1, wherein:

the second hardware element is a first particular hardware element of a plurality of hardware elements that are connected in a series;

causing the first hardware element to be notified of the result data comprises causing the result data to be sent to a buffer of a second particular hardware element of the plurality of hardware elements.

10. The processing chip of claim 1, wherein:

the address data included in the scan operation command includes one or more virtual addresses;

the second hardware element is further configured to cause the one or more virtual addresses to be replaced with one or more physical addresses that the second hardware element uses to read the input data.

11. The processing chip of claim 1, wherein:

the one or more values comprises a plurality of data elements;

performing the comparison between the input data and the one or more values comprises performing the comparison between the input data with the plurality of data elements simultaneously.

12. The processing chip of claim 11, wherein generating the result data based on the comparison comprises generating a bit vector, wherein each bit in the bit vector indicates whether a comparison yielded a true or false.

13. A method comprising:

receiving a query that involves a database operation and one or more other operations;

in response to receiving the query;

processing, by a microprocessor, the one or more other operations;

sending, to a coprocessor that is different than the microprocessor, a database operation command that corresponds to the database operation and that is associated with one or more values;

processing, by the coprocessor, the database operation command by;

performing a comparison between input data that is referenced by the query and the one or more values that are associated with the database operation command;

generating result data based on the comparison;

causing the result data to be stored.

14. The method of claim 13, wherein:

the database operation command includes, as parameters, address data that is used to identify the input data to be read by the coprocessor;

processing the database operation command further comprises;

reading the database operation command from memory;

causing the input data to be read from a location that is indicated by the address data.

15. The method of claim 14, wherein:

the address data included in the database operation command includes one or more virtual addresses;

the method further comprising causing the one or more virtual addresses to be replaced with one or more physical addresses that the coprocessor uses to read the input data.

16. The method of claim 13, wherein:

the database operation command further includes operation type data that indicates a type of operation to perform;

processing the database operation command further by first identifying the operation type data to determine the type of operation.

17. The method of claim 13, wherein the database operation command further includes destination data that indicates where the result data is to be stored.

18. The method of claim 13, wherein causing the result data to be stored comprises causing the result data to be stored in cache of the microprocessor.

19. The method of claim 13, wherein causing the result data to be stored further comprises causing, to be stored, a completion status that indicates that the database operation command has been performed.

20. The method of claim 13, further comprising:

retrieving the result data from storage;

after retrieving the result data from the storage, processing the one or more other operations that require the result data as input to the one or more other operations.

21. The method of claim 13, wherein:

the coprocessor is a first coprocessor of a plurality of coprocessors that are connected in a series;

causing the result data to be stored comprises causing the result data to be sent to a buffer of a second coprocessor of the plurality of coprocessors;

the method further comprising;

reading, by the second coprocessor, the result data from the buffer while the first coprocessor is executing a portion of the query, and

based on the result data, generating, by the second coprocessor, second result data.

22. The method of claim 13, wherein:

generating the database operation command comprises generating a plurality of database operation commands that includes the database operation command;

the method further comprising, for each database operation command of the plurality of database operation commands, causing said each database operation command to be stored in memory;

each coprocessor of a plurality of coprocessors selects a different database operation command of the plurality of database operation commands.

23. The method of claim 13, further comprising determining whether one or more criteria are satisfied, wherein sending the database operation command to be sent to the coprocessor is only performed if the one or more criteria are satisfied.

24. The method of claim 23, wherein the one or more criteria is based on an amount of data that needs to be read in by the coprocessor to perform the database operation.

25. The method of claim 13, wherein:

the one or more values comprises a plurality of data elements;

performing the comparison between the input data and the one or more values comprises comparing the input data with the plurality of data elements simultaneously.

26. The method of claim 13, wherein generating the result data based on the comparison comprises generating a bit vector, wherein each bit in the bit vector indicates whether a comparison yielded a true or false.