Vertical transistor device structure with cylindrically-shaped regions

• US 9,543,396 B2
• Filed: 10/22/2014
• Issued: 01/10/2017
• Est. Priority Date: 12/13/2013
• Status: Active Grant

• Current Assignee: Power Integrations Incorporated
• Original Assignee: Power Integrations Incorporated
• Inventors: Georgescu, Sorin Stefan, Grabowski, Wayne Byran, Varadarajan, Kamal Raj, Zhu, Lin, Yang, Kuo-Chang Robert
• Primary Examiner(s): Luke, Daniel
• Assistant Examiner(s): RAHMAN, KHATIB A
• Application Number:
  US14/520,527
• Publication Number:
  US 20150171174A1
• Time in Patent Office: 811 Days
• US Class Current: 1/1
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/4238 characterised by the surface lay-out
• CPC Class Codes: H01L 29/66666 Vertical transistors H01L29/66712, H01L29/66742 take precedence
• CPC Class Codes: H01L 29/66712 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
• CPC Class Codes: H01L 29/7802 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/7827 Vertical transistors H01L29/7802, H01L29/78642 take precedence

Abstract

A vertical power transistor device includes a semiconductor layer of a first conductivity type, with a plurality of cylindrically-shaped dielectric regions disposed in the semiconductor layer. The cylindrically-shaped dielectric regions extend in a vertical direction from a top surface of the semiconductor layer downward. Adjacent ones of the cylindrically-shaped dielectric regions being laterally separated along a common diametrical axis by a narrow region of the semiconductor layer having a first width. Each dielectric region has a cylindrically-shaped, conductive field plate member centrally disposed therein. The cylindrically-shaped, conductive field plate member extends in the vertical direction from the top surface downward to near a bottom of the dielectric region. The dielectric region laterally separates the cylindrically-shaped, conductive field plate member from the narrow region. A source region is disposed at the top surface, and a drain region is disposed at the bottom, of the semiconductor layer.

Claims

1. A vertical power transistor device comprising:

a semiconductor layer of a first conductivity type;

a plurality of cylindrically-shaped dielectric regions disposed in the semiconductor layer, each cylindrically-shaped dielectric region having an outer side that extends in a vertical direction from a top surface of the semiconductor layer downward, each cylindrically-shaped dielectric region having a circular cross-section in a horizontal plane perpendicular to the vertical direction, adjacent ones of the cylindrically-shaped dielectric regions being laterally separated along a common diametrical axis by a narrow region of the semiconductor layer having a first width;

each cylindrically-shaped dielectric region having a cylindrical field plate member centrally disposed therein, the cylindrical field plate member having a circular cross-section in the horizontal plane and comprising a conductive material that fully extends laterally across a diameter of the circular cross-section of the cylindrical field plate member, the conductive material extending in the vertical direction from the top surface downward to near a bottom of the cylindrically-shaped dielectric region, the cylindrically-shaped dielectric region laterally separating the cylindrical field plate member from the narrow region;

a source region of the first conductivity type disposed at the top surface of the narrow region;

a body region of a second conductivity type, the body region separating the source from a lower portion of the narrow region, the lower portion comprising a drift region;

a drain region of the first conductivity type disposed beneath the semiconductor layer; and

a ring-shaped gate member disposed in each cylindrically-shaped dielectric region between the narrow region and the cylindrical field plate member.

2. The vertical power transistor device according to claim 1 wherein a lateral width of the cylindrically-shaped dielectric region separates the cylindrical field plate member from the narrow drift region, the lateral width being substantially the same at all points along a side surface of the cylindrical field plate member.

3. The vertical power transistor device according to claim 1 wherein the ring-shaped gate member is a planar gate member.

4. The vertical power transistor device according to claim 1 wherein the cylindrical field plate members each comprise polysilicon.

5. The vertical power transistor device according to claim 1 wherein a cell of the vertical power transistor device comprises a triad of the cylindrically-shaped dielectric regions in an equilateral triangular arrangement.

6. The vertical power transistor device according to claim 1 further comprising a substrate, the semiconductor layer comprising an epitaxial layer disposed on the substrate.

7. The vertical power transistor device according to claim 1 wherein the substrate is the first conductivity type.

8. The vertical power transistor device according to claim 1 wherein the substrate is a second conductivity type.

9. The vertical power transistor device according to claim 1 wherein the first conductivity type comprises n-type.

10. The vertical power transistor device according to claim 1 wherein each of the cylindrically-shaped dielectric regions extends downward into the drain region.

11. The vertical power transistor device according to claim 1 wherein the drift region has a doping concentration that varies from near the body region down to near the bottom of the drift region.

12. The vertical power transistor device according to claim 1 wherein the drift region comprises an epitaxial layer having a graded doping profile.

13. The vertical power transistor device according to claim 11 wherein the doping concentration is highest near the bottom of the drift region.

14. A high-voltage transistor comprising:

a substrate;

an array of cylindrically-shaped dielectric regions disposed in the substrate and arranged in an equilateral triangular layout, each of the cylindrically-shaped dielectric regions having an outer side that extends in a vertical direction from a top surface of the substrate downward, the cylindrically-shaped dielectric regions having a circular cross-section in a horizontal plane perpendicular to the vertical direction, adjacent ones of the cylindrically-shaped dielectric regions being laterally separated along a common diametrical axis by a narrow region of the substrate having a first width;

each cylindrically-shaped dielectric region having a cylindrical field plate member centrally disposed therein, the cylindrical field plate member having a circular cross-section in the horizontal plane and comprising a conductive material that fully extends laterally across a diameter of the circular cross-section of the cylindrical field plate member, the conductive material extending in the vertical direction from the top surface downward to near a bottom of the cylindrically-shaped dielectric region, the cylindrically-shaped dielectric region laterally separating the cylindrical field plate member from the narrow region;

a source disposed at the top surface of the narrow region;

a body region that separates the source from a lower portion of the narrow region, the lower portion comprising a drift region;

a drain disposed at the bottom of the substrate; and

a ring-shaped gate member disposed in each cylindrically-shaped dielectric region between the narrow region and the cylindrical field plate member.

15. The high-voltage transistor according to claim 14 wherein the gate member is a planar gate member.

16. The high-voltage transistor according to claim 14 wherein the cylindrically-shaped dielectric regions each comprises an oxide.

17. The high-voltage transistor according to claim 14 wherein the first width is in a range of approximately 1-2 microns wide.

18. The high-voltage transistor according to claim 14 wherein the narrow region has a doping concentration in a range of about 1×

10¹⁵/cm³ to about 1×

10¹⁷/cm³.

19. The high-voltage transistor according to claim 14 wherein each of the cylindrically-shaped dielectric regions extends downward into the drain.