High power insulated gate bipolar transistors
First Claim
1. A method of forming an insulated gate bipolar transistor (IGBT) device, comprising:
- forming a p-type drift layer;
forming an n-type well in the p-type drift layer;
epitaxially growing a p-type channel adjustment layer on the p-type drift layer and on the n-type well;
implanting p-type dopant ions to form a p-type emitter region that extends through the p-type channel adjustment layer and into the n-type well, the p-type emitter region at least partially defining a channel region in the n-type well adjacent the p-type emitter region;
implanting n-type dopant ions to form an n-type connector region that is adjacent the p-type emitter region and extends through the channel adjustment layer and into the n-type well;
forming a gate oxide layer on the channel region; and
forming a gate on the gate oxide layer.
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Accused Products
Abstract
A method of forming a transistor device include forming a drift layer of a first conductivity type, forming a well of a second conductivity type in the drift layer, forming a JFET region with first conductivity type dopant ions in the drift layer, forming a channel adjustment layer of the first conductivity type on the JFET region and the well, implanting first conductivity type dopant ions to form an emitter region of the first conductivity type extending through the channel adjustment layer and into the well, wherein the emitter region is spaced apart from the JFET region by the well, implanting second conductivity type dopant ions to form a connector region of the second conductivity type adjacent the emitter region, forming a gate oxide layer on the channel region, and forming a gate on the gate oxide layer.
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Citations
24 Claims
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1. A method of forming an insulated gate bipolar transistor (IGBT) device, comprising:
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forming a p-type drift layer; forming an n-type well in the p-type drift layer; epitaxially growing a p-type channel adjustment layer on the p-type drift layer and on the n-type well; implanting p-type dopant ions to form a p-type emitter region that extends through the p-type channel adjustment layer and into the n-type well, the p-type emitter region at least partially defining a channel region in the n-type well adjacent the p-type emitter region; implanting n-type dopant ions to form an n-type connector region that is adjacent the p-type emitter region and extends through the channel adjustment layer and into the n-type well; forming a gate oxide layer on the channel region; and forming a gate on the gate oxide layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
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20. A method of forming an insulated gate bipolar transistor (IGBT) device, comprising:
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forming a drift layer of a first conductivity type; forming a well of a second conductivity type in the drift layer; forming a JFET region with first conductivity type dopant ions in the drift layer; forming a channel adjustment layer of the first conductivity type on the JFET region and the well; implanting first conductivity type dopant ions to form an emitter region of the first conductivity type that extends through the channel adjustment layer and into the well, wherein the emitter region is spaced apart from the JFET region by the well; implanting second conductivity type dopant ions to form a connector region of the second conductivity type that is adjacent the emitter region and into the well; forming a gate oxide layer on the channel region; and forming a gate on the gate oxide layer. - View Dependent Claims (21, 22, 23, 24)
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Specification