Read scrub with adaptive counter management
First Claim
1. A method, comprising:
- for a non-volatile memory circuit having a plurality of blocks formed according to a NAND type architecture in which memory cells of a block are formed along a plurality of word lines and in which the word lines of a block are written in sequence from a first end to a second end thereof, maintaining, for blocks in which one or more but less than all of the word lines have been written, first and second read counts, where the first read count tracks the cumulative number of reads for all word lines of the corresponding block, where the second read count tracks the cumulative number of reads to one or more of the last word lines in the write sequence of the corresponding block that is written at the time at which the read is performed, and wherein the first and second read counts are reset after an erase operation to the corresponding block; and
in response to either of the first or second read counts of a block reaching a respective first or second count threshold, marking the corresponding block for a data relocation operation.
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Accused Products
Abstract
A number of complimentary techniques for the read scrub process using adaptive counter management are presented. In one set of techniques, in addition to maintaining a cumulative read counter for a block, a boundary word line counter can also be maintained to track the number of reads to most recently written word line or word lines of a partially written block. Another set of techniques used read count threshold values that vary with the number of program/erase cycles that a block has undergone. Further techniques involve setting the read count threshold for a closed (fully written) block based upon the number reads it experienced prior to being closed. These techniques can also be applied at a sub-block, zone level.
166 Citations
20 Claims
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1. A method, comprising:
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for a non-volatile memory circuit having a plurality of blocks formed according to a NAND type architecture in which memory cells of a block are formed along a plurality of word lines and in which the word lines of a block are written in sequence from a first end to a second end thereof, maintaining, for blocks in which one or more but less than all of the word lines have been written, first and second read counts, where the first read count tracks the cumulative number of reads for all word lines of the corresponding block, where the second read count tracks the cumulative number of reads to one or more of the last word lines in the write sequence of the corresponding block that is written at the time at which the read is performed, and wherein the first and second read counts are reset after an erase operation to the corresponding block; and in response to either of the first or second read counts of a block reaching a respective first or second count threshold, marking the corresponding block for a data relocation operation. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A non-volatile memory system, comprising:
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a non-volatile memory circuit having a plurality of blocks formed according to a NAND type architecture in which memory cells of a block are formed along a plurality of word lines; and a controller connected to the non-volatile memory circuit to manage the storage of data thereon, wherein in writing data to a block of the non-volatile memory circuit word lines are written in sequence from a first end to a second end thereof, and wherein the controller maintains, for blocks in which one or more but less than all of the word lines have been written, first and second read counts, where the first read count tracks the cumulative number of reads for all word lines of the corresponding block, where the second read count tracks the cumulative number of reads to one or more of the last word lines in the write sequence of the corresponding block that is written at the time at which the read is performed, and wherein the first and second read counts are reset after an erase operation to the corresponding block; and in response to either of the first or second read counts of a block reaching a respective first or second count threshold, the controller marks the corresponding block for a data relocation operation. - View Dependent Claims (11, 12, 13, 14, 15)
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16. A non-volatile memory controller, comprising:
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RAM memory; and logic circuitry configured to manage the storage of data on a non-volatile memory circuit having a plurality of blocks formed according to a NAND type architecture in which memory cells of a block are formed along a plurality of word lines, wherein in writing data to a block of the non-volatile memory circuit word lines are written in sequence from a first end to a second end thereof, wherein managing the storage of data on the non-volatile memory circuit includes; maintaining, for blocks in which one or more but less than all of the word lines have been written, first and second read counts, where the first read count tracks the cumulative number of reads for all word lines of the corresponding block, where the second read count tracks the cumulative number of reads to one or more of the last word lines in the write sequence of the corresponding block that is written at the time at which the read is performed, and wherein the first and second read counts are reset after an erase operation to the corresponding block; and in response to either of the first or second read counts of a block reaching a respective first or second count threshold, marking the corresponding block for a data relocation operation. - View Dependent Claims (17, 18, 19, 20)
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Specification