Fabricating method for high voltage semiconductor power switching device

• US 9,553,085 B2
• Filed: 11/23/2015
• Issued: 01/24/2017
• Est. Priority Date: 10/28/2013
• Status: Active Grant

• Current Assignee: Mosway Semiconductor Limited
• Original Assignee: Mosway Semiconductor Limited
• Inventors: Tse, Chiu-Sing Celement, Chan, On-Bon Peter, Tang, Chi-Keung
• Primary Examiner(s): HENRY, CALEB E
• Application Number:
  US14/949,021
• Publication Number:
  US 20160079237A1
• Time in Patent Office: 428 Days
• US Class Current: 1/1
• CPC Class Codes: H01L 21/565 Moulds
• CPC Class Codes: H01L 21/8249 Bipolar and MOS technology
• CPC Class Codes: H01L 21/84 the substrate being other than a semiconductor body, e.g. being an insulating body
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/49171 Fan-out arrangements
• CPC Class Codes: H01L 23/535 including internal interconnections, e.g. cross-under constructions internal lead connections H01L23/481
• CPC Class Codes: H01L 27/0635 in combination with bipolar transistors and diodes, or resistors, or capacitors
• CPC Class Codes: H01L 27/0647 Bipolar transistors in combination with diodes, or capacitors, or resistors, e.g. vertical bipolar transistor and bipolar lateral transistor and resistor
• CPC Class Codes: H01L 27/0825 Combination of vertical direct transistors of the same conductivity type having different characteristics,(e.g. Darlington transistors)
• CPC Class Codes: H01L 27/1203 the substrate comprising an insulating body on a semiconductor body, e.g. SOI three-dimensional layout H01L27/0688
• CPC Class Codes: H01L 29/0634 Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
• CPC Class Codes: H01L 29/0804 Emitter regions of bipolar transistors
• CPC Class Codes: H01L 29/0821 Collector regions of bipolar transistors
• CPC Class Codes: H01L 29/0847 of field-effect transistors with insulated gate H01L29/0653 takes precedence; with a passive supplementary region between source or drain and substrate related to punch-through, capacity or isolation phenomena H01L29/1079; with LDD or DDD structure H01L29/7833; for thin film transistors H01L29/78618
• CPC Class Codes: H01L 29/1004 Base region of bipolar transistors
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/41708 Emitter or collector electrodes for bipolar transistors
• CPC Class Codes: H01L 29/41758 for lateral devices with structured layout for source or drain region, i.e. the source or drain region having cellular, interdigitated or ring structure or being curved or angular H01L29/41733 - H01L29/4175 take precedence
• CPC Class Codes: H01L 29/42304 Base electrodes for bipolar transistors
• CPC Class Codes: H01L 29/42356 : Disposition, e.g. buried gate electrode H01L29/42324 and H01L29/4234 take precedence
• CPC Class Codes: H01L 29/42364 : characterised by the insulating layer, e.g. thickness or uniformity H01L29/42324 and H01L29/4234 take precedence
• CPC Class Codes: H01L 29/45 : Ohmic electrodes
• CPC Class Codes: H01L 29/4916 : the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/872 : Schottky diodes
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/13055 : Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

Abstract

A three terminal high voltage Darlington bipolar transistor power switching device includes two high voltage bipolar transistors, with collectors connected together serving as the collector terminal. The base of the first high voltage bipolar transistor serves as the base terminal. The emitter of the first high voltage bipolar transistor connects to the base of the second high voltage bipolar transistor (inner base), and the emitter of the second high voltage bipolar transistor serves as the emitter terminal. A diode has its anode connected to the inner base (emitter of the first high voltage bipolar transistor, or base of the second high voltage bipolar transistor), and its cathode connected to the base terminal. Similarly, a three terminal hybrid MOSFET/bipolar high voltage switching device can be formed by replacing the first high voltage bipolar transistor of the previous switching device by a high voltage MOSFET.

Claims

1. A method of fabricating a three terminal high voltage hybrid MOSFET/bipolar transistor power switching device having a collector terminal, a gate bonding terminal with a gate bonding pin and an emitter with an emitter pin, including the steps of:

conductive die attaching a high voltage MOSFET and a high voltage bipolar transistor having a substrate as a drain and a collector terminal respectively, to a main die pad of a three terminal power device, which serves as the collector terminal for the power switching device;

conductive die attaching a diode having a cathode and an anode with the cathode as a substrate to the gate bonding pin of the gate terminal of the three terminal power device;

bonding a gate of the high voltage MOSFET to the gate terminal of the three terminal power device package;

inter-chip bonding of a source of the high voltage MOSFET to a base of the high voltage bipolar transistor;

bonding of the source of the high voltage MOSFET and/or a base of the high voltage bipolar transistor to the anode of the diode;

bonding of an emitter of the high voltage bipolar transistor to the emitter pin of the three pin power; and

subsequent standard moulding and follow on process to complete the device.

2. The method of claim 1, wherein the diode is a Schottky diode.