Semiconductor device and method for manufacturing the same
First Claim
1. A method for manufacturing a semiconductor device comprising the steps of:
- forming a base insulating film;
forming an oxide semiconductor layer over the base insulating film;
forming a gate insulating layer over the oxide semiconductor layer;
forming a gate electrode layer to overlap with the oxide semiconductor layer with the gate insulating layer interposed therebetween;
forming a first insulating layer to cover the gate insulating layer and the gate electrode layer;
introducing an impurity element through the first insulating layer to form a pair of impurity regions in the oxide semiconductor layer;
forming a second insulating layer over the first insulating layer;
etching the first insulating layer and the second insulating layer to form a sidewall insulating layer in contact with a side surface of the gate electrode layer;
forming a conductive layer over the oxide semiconductor layer, the sidewall insulating layer, the gate electrode layer, and the base insulating film;
etching the conductive layer, wherein an etched conductive layer covers the oxide semiconductor layer, the sidewall insulating layer, and the gate electrode layer; and
polishing the etched conductive layer to remove the etched conductive layer that overlaps with the gate electrode layer, thereby forming a source electrode layer and a drain electrode layer.
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Accused Products
Abstract
An oxide semiconductor layer is formed, a gate insulating layer is formed over the oxide semiconductor layer, a gate electrode layer is formed to overlap with the oxide semiconductor layer with the gate insulating layer interposed therebetween, a first insulating layer is formed to cover the gate insulating layer and the gate electrode layer, an impurity element is introduced through the insulating layer to form a pair of impurity regions in the oxide semiconductor layer, a second insulating layer is formed over the first insulating layer, the first insulating layer and the second insulating layer are anisotropically etched to form a sidewall insulating layer in contact with a side surface of the gate electrode layer, and a source electrode layer and a drain electrode layer in contact with the pair of impurity regions are formed.
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Citations
22 Claims
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1. A method for manufacturing a semiconductor device comprising the steps of:
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forming a base insulating film; forming an oxide semiconductor layer over the base insulating film; forming a gate insulating layer over the oxide semiconductor layer; forming a gate electrode layer to overlap with the oxide semiconductor layer with the gate insulating layer interposed therebetween; forming a first insulating layer to cover the gate insulating layer and the gate electrode layer; introducing an impurity element through the first insulating layer to form a pair of impurity regions in the oxide semiconductor layer; forming a second insulating layer over the first insulating layer; etching the first insulating layer and the second insulating layer to form a sidewall insulating layer in contact with a side surface of the gate electrode layer; forming a conductive layer over the oxide semiconductor layer, the sidewall insulating layer, the gate electrode layer, and the base insulating film; etching the conductive layer, wherein an etched conductive layer covers the oxide semiconductor layer, the sidewall insulating layer, and the gate electrode layer; and polishing the etched conductive layer to remove the etched conductive layer that overlaps with the gate electrode layer, thereby forming a source electrode layer and a drain electrode layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 21)
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11. A method for manufacturing a semiconductor device comprising the steps of:
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forming a base insulating film; forming an oxide semiconductor layer over the base insulating film; forming a gate insulating layer over the oxide semiconductor layer; forming a gate electrode layer to overlap with the oxide semiconductor layer with the gate insulating layer interposed therebetween; forming a first insulating layer to cover the gate insulating layer and the gate electrode layer; introducing an impurity element through the first insulating layer to form a pair of impurity regions in the oxide semiconductor layer; forming a second insulating layer over the first insulating layer; etching the first insulating layer and the second insulating layer to form a sidewall insulating layer in contact with a side surface of the gate electrode layer; forming a conductive layer over the oxide semiconductor layer, the sidewall insulating layer, the gate electrode layer, and the base insulating film; etching the conductive layer, wherein an etched conductive layer covers the oxide semiconductor layer, the sidewall insulating layer, and the gate electrode layer; forming a third insulating layer over the etched conductive layer, the third insulating layer being in contact with the base insulating film; and polishing the etched conductive layer and the third insulating layer to remove the etched conductive layer that overlaps with the gate electrode layer, thereby forming a source electrode layer and a drain electrode layer. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20, 22)
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Specification