Reference voltage generator

• US 9,557,759 B2
• Filed: 10/14/2014
• Issued: 01/31/2017
• Est. Priority Date: 01/09/2014
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Kwon, Sunwoo, Lee, Myung-Jin
• Primary Examiner(s): Berhane, Adolf
• Assistant Examiner(s): LEE III, HENRY E
• Application Number:
  US14/513,800
• Publication Number:
  US 20150192946A1
• Time in Patent Office: 840 Days
• US Class Current: 1/1
• CPC Class Codes: G05F 1/468 characterised by reference voltage circuitry, e.g. soft start, remote shutdown
• CPC Class Codes: G05F 3/08 wherein the variable is dc

Abstract

A reference voltage generator including an electrostatic discharge (ESD) resistor, a first branch coupled to the ESD resistor and including a first capacitor, a second branch coupled to the ESD resistor and including a second capacitor, wherein the first and second capacitors are coupled in parallel, a first switch configured to control a first charge transfer path leading to the first branch, and a second switch configured to control a second charge transfer path leading to the second branch.

Claims

1. A reference voltage generator, comprising:

an electrostatic discharge (ESD) resistor;

a first branch coupled to the ESD resistor and including a first capacitor;

a second branch coupled to the ESD resistor and including a second capacitor, wherein the first and second capacitors are coupled in parallel;

a first switch configured to control a first charge transfer path leading to the first branch; and

a second switch configured to control a second charge transfer path leading to the second branch,

wherein the first switch is controlled by a first clock signal and the second switch is controlled by a second clock signal,

wherein at least one of frequency and duty ratio of the first clock signal is changed for tuning a resistance value of the ESD resistor.

2. The reference voltage generator according to claim 1, wherein active intervals of the first and second clock signals do not overlap each other.

3. The reference voltage generator according to claim 1, wherein charges are moved from the ESD resistor to the first capacitor by closing the first switch.

4. The reference voltage generator according to claim 3, wherein a charging time during which the charges move from the ESD resistor to the first capacitor is controlled by adjusting an on-time of the first switch.

5. The reference voltage generator according to claim 1, wherein charges are moved from the first capacitor to the second capacitor by closing the second switch.

6. The reference voltage generator according to claim 5, wherein a charging time during which the charges move from the first capacitor to the second capacitor is controlled by adjusting an on-time of the second switch.

7. The reference voltage generator according to claim 2, wherein during a first time, the first switch is turned on and the second switch is turned off.

8. The reference voltage generator according to claim 7, wherein during a second time, the first switch is turned off and the second switch is turned on.

9. A reference voltage generator, comprising:

an electrostatic discharge (ESD) resistor;

a first switch configured to control a charge transfer path leading from the ESD resistor;

a second switch connected to the first switch in series;

a first capacitor provided between the first switch and the second switch and coupled in parallel to the first switch and the second switch; and

a second capacitor coupled to the first capacitor in parallel,

wherein the first switch is controlled by a first clock signal and the second switch is controlled by a second clock signal,

wherein at least one of frequency and duty ratio of the first clock signal is changed for tuning a resistance value of the ESD resistor.

10. The reference voltage generator according to claim 9, wherein active intervals of the first and second clock signals do not overlap each other.

11. The reference voltage generator according to claim 9, wherein the first capacitor is a filtering capacitor.

12. The reference voltage generator according to claim 11, wherein a charging time during which charges move from the ESD resistor to the first capacitor is controlled by adjusting an on-time of the first switch.

13. The reference voltage generator according to claim 9, wherein the second capacitor is configured to accumulate charges to generate a reference voltage.

14. The reference voltage generator according to claim 13, wherein a charging time during which charges move from the first capacitor to the second capacitor is controlled by adjusting an on-time of the second switch.

15. The reference voltage generator according to claim 9, further comprising a fourth switch coupled between the second capacitor and an input terminal of an operational amplifier.

16. A reference voltage generator, comprising:

a first resistor having a first terminal connected to a power voltage;

a first switch connected to a second terminal of the first resistor;

a second switch connected in series to the first switch;

a first capacitor having a first terminal connected between the first and second switches and a second terminal connected to a ground voltage;

a second capacitor having a first terminal connected to the second switch and a second terminal connected to an input of an operational amplifier, wherein the first and second switches are controlled by first and second clock signals, respectively;

a third switch connected to the first terminal of the first resistor and the first terminal of the second capacitor, wherein the third switch is controlled by a third clock signal; and

a fourth switch connected to the second terminal of the second capacitor, wherein the fourth switch is controlled by the first clock signal.

17. The reference voltage generator according to claim 16, wherein active periods of the first, second and third clock signals do not overlap.

18. The reference voltage generator according to claim 16, wherein the reference voltage generator is included in an analog-to-digital converter.