Enhanced phase interpolation circuit
First Claim
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1. An apparatus comprising:
- a phase control circuit comprising,a differential current generator having a differential output node configured to provide a differential drive current;
a current conversion circuit connected to the differential output node configured to receive the differential drive current through saturated input Field-Effect Transistors (FETs), the saturated input FETs connected to triode mirroring FETs, the triode mirroring FETs configured to generate linearized current drive signals through first and second output drive nodes; and
,a phase interpolator circuit having a first phase driver circuit configured to receive a first phase of a reference signal, the first phase driver circuit connected to the first output drive node, and a second phase driver circuit configured to receive a second phase of the reference signal, the second phase driver circuit connected to the second output drive node, and configured to generate a phase interpolated reference signal.
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Abstract
A phase control circuit comprising a differential current generator having a differential output node configured to provide a differential drive current and a current conversion circuit connected to the differential output node configured to receive the differential drive current through saturated input Field-Effect Transistors (FETs), the saturated input FETs connected to triode mirroring FETs, the triode mirroring FETs configured to generate linearized current drive signals through first and second output drive nodes to drive a phase interpolator circuit.
246 Citations
20 Claims
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1. An apparatus comprising:
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a phase control circuit comprising, a differential current generator having a differential output node configured to provide a differential drive current; a current conversion circuit connected to the differential output node configured to receive the differential drive current through saturated input Field-Effect Transistors (FETs), the saturated input FETs connected to triode mirroring FETs, the triode mirroring FETs configured to generate linearized current drive signals through first and second output drive nodes; and
,a phase interpolator circuit having a first phase driver circuit configured to receive a first phase of a reference signal, the first phase driver circuit connected to the first output drive node, and a second phase driver circuit configured to receive a second phase of the reference signal, the second phase driver circuit connected to the second output drive node, and configured to generate a phase interpolated reference signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A method comprising:
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receiving a differential drive current through saturated input Field-Effect Transistors (FETs); generating linearized current drive signals through triode mirroring FETs, the triode mirroring FETs connected to the saturated input FETs; receiving first and second phases of a reference signal; and generating, using first and second phase driver circuits, a phase interpolated reference signal based on the received first and second phases of the reference signal and the linearized current drive signals. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20)
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Specification