Integrated cable modem

• US 9,560,420 B2
• Filed: 11/04/2013
• Issued: 01/31/2017
• Est. Priority Date: 05/21/2004
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: McMullin, Donald G., Burns, Lawrence M., Dauphinee, Leonard, Gomez, Ramon A., Tan, Loke
• Primary Examiner(s): RABOVIANSKI, JIVKA A
• Application Number:
  US14/071,332
• Publication Number:
  US 20140059632A1
• Time in Patent Office: 1,184 Days
• Field of Search: 725/111
• US Class Current: 1/1
• CPC Class Codes: H04N 21/25883 being end-user demographical data, e.g. age, family status or address arrangements for identifying locations of users in broadcast systems H04H60/52
• CPC Class Codes: H04N 21/25891 being end-user preferences retrieval of video data in a video database based on user preferences G06F16/739; arrangements for recognizing users' preferences H04H60/46; user profiles in network data switching protocols H04L67/306; processing of user preferences or user profiles in wireless networks H04W8/18
• CPC Class Codes: H04N 21/4263 involving specific tuning arrangements, e.g. two tuners
• CPC Class Codes: H04N 21/6168 involving cable transmission, e.g. using a cable modem

Abstract

The present invention is an integrated cable modem tuner. In one embodiment, the upstream path and the downstream path are integrated on a common semiconductor substrate. The down-stream path can include a TV tuner and digital receiver portion that is integrated on a common semiconductor substrate with the power amplifier of the upstream path. In another embodiment, the TV tuner is implemented on a first semiconductor substrate and the digital receiver portion and the power amplifier are configured on a second semiconductor substrate. However, the two substrates are mounted on a common carrier so that the cable modem appears to be a single chip configuration to the user.

Claims

1. An integrated cable modem, comprising:

a down-conversion circuit configured to down-convert a downstream signal in accordance with a quadrature local oscillator signal to generate a plurality of down-converted components;

a multiplexer configured to interleave the plurality of down-converted components;

an analog-to-digital converter (ADC), coupled to an output of the multiplexer, configured to convert the interleaved plurality of down-converted components into a single data stream;

a demodulator circuit configured to generate a plurality of digital outputs based on the single data stream; and

an oscillator circuit coupled to an output of the demodulator circuit and to an input of the down-conversion circuit, and wherein the oscillator circuit is configured to;

receive an error signal that is generated based on the plurality of digital outputs,

adjust a quadrature component of the quadrature local oscillator signal based on the error signal, and

send the adjusted quadrature local oscillator signal to the down-conversion circuit.

2. The integrated cable modem of claim 1, wherein the ADC is further configured to generate a single digitized signal, and wherein the integrated cable modem further comprises:

a de-multiplexer configured to de-interleave the single digitized signal into a plurality of data streams.

3. The integrated cable modem of claim 2, further comprising:

an equalizer, coupled between the ADC and the demodulator circuit, wherein the equalizer is configured to perform IQ imbalance correction.

4. The integrated cable modem of claim 2, wherein the demodulator circuit is configured to:

receive the plurality of data streams; and

generate the plurality of digital outputs based on the plurality of data streams.

5. The integrated cable modem of claim 1, further comprising:

an upstream path, including a power amplifier, configured to produce an upstream signal.

6. The integrated cable modem of claim 5, wherein the down-conversion circuit, the multiplexer, the demodulator circuit, and the upstream path are disposed on a common substrate.

7. The integrated cable modem of claim 1, wherein the down-conversion circuit is a quadrature down-conversion circuit.

8. The integrated cable modem of claim 7, wherein the quadrature down-conversion circuit comprises:

a first mixer configured to down;

convert the downstream signal based on the quadrature local oscillator signal; and

a second mixer configured to down;

convert the downstream signal based on a second quadrature local oscillator signal.

9. The integrated cable modem of claim 8, wherein the oscillator circuit is configured to generate the quadrature local oscillator signal and the second quadrature local oscillator signal based on the error signal.

10. The integrated cable modem of claim 1, wherein the multiplexer is configured to interleave a first sample of a first down-converted quadrature component and a second sample of a second down-converted quadrature component.

11. The integrated cable modem of claim 1, further comprising:

an IQ error detection circuit configured to;

determine an error in the plurality of down-converted components, and

generate the error signal.

12. The integrated cable modem of claim 1, wherein the oscillator circuit further comprises:

a direct digital frequency synthesizer (DDFS) configured to generate a digital representation of an oscillator signal based on a received desired frequency.

13. The integrated cable modem of claim 12, wherein the DDFS comprises:

a phase accumulator; and

a phase-to-sine converter.

14. The integrated cable modem of claim 12, further comprising:

a plurality of phase locked loops (PLLs) configured to generate, based on the digital representation of the oscillator signal, a plurality of quadrature components to adjust the down-conversion circuit.

15. The integrated cable modem of claim 1, wherein the oscillator circuit is configured to adjust the quadrature component to correct an IQ error in the error signal, and wherein the oscillator circuit is further configured to correct a frequency error in the error signal.

16. The integrated cable modem of claim 1, wherein the error signal comprises a frequency error in the plurality of down-converted components.

17. A method for generating a plurality of digital outputs in a cable modem device, the method comprising:

down-converting, using a down-conversion circuit of the cable modem device, a downstream signal in accordance with a quadrature local oscillator signal to generate a plurality of down-converted components;

interleaving, using the cable modem device, the plurality of down-converted components;

converting, using the cable modem device, the interleaved plurality of down-converted components into a single data stream;

generating, using the cable modem device, the plurality of digital outputs based on the single data stream;

receiving, using the cable modem device, an error signal that is generated based on the plurality of digital outputs;

adjusting a quadrature component of the quadrature local oscillator signal based on the error signal; and

sending the adjusted quadrature local oscillator signal to the down conversion circuit.

18. The method of claim 17, further comprising:

converting the single data stream from an analog representation to a digital representation to generate a single digitized signal; and

de-interleaving the single digitized signal into a plurality of data streams.

19. The method of claim 17, further comprising:

down-converting the downstream signal based on a second quadrature local oscillator signal.

20. The method of claim 17, wherein the error signal comprises a frequency error in the plurality of down-converted components.

21. A circuit for an integrated cable modem, the circuit comprising:

a multiplexer configured to;

receive a plurality of down-converted quadrature components of a downstream signal from a down-conversion circuit, and

interleave the plurality of down-converted quadrature components;

an analog-to-digital converter (ADC), coupled to an output of the multiplexer, configured to convert the interleaved plurality of down-converted quadrature components from an analog representation to a digital representation to generate a single digitized signal;

a de-multiplexer configured to de-interleave the single digitized signal into a plurality of data streams; and

an oscillator circuit configured to;

receive an error signal that is generated based on the plurality of data streams,

adjust a quadrature component of a quadrature local oscillator signal based on the error signal, and

send the adjusted quadrature local oscillator signal to the down;

conversion circuit.

22. The circuit of claim 21, wherein the ADC is configured to oversample the interleaved plurality of down-converted quadrature components to extend a noise performance of the ADC.

23. The circuit of claim 21, wherein the error signal comprises a frequency error in the plurality of down-converted quadrature components.

24. A tuner for an integrated cable modem, the tuner comprising:

a down-conversion circuit configured to down-convert a downstream signal to generate a plurality of down-converted components based on a local oscillator signal;

a multiplexer, coupled to an output of the down-conversion circuit, configured to interleave a plurality of down-converted quadrature components of the downstream signal;

an analog-to-digital converter (ADC), coupled to an output of the multiplexer, configured to convert the interleaved plurality of down-converted components from an analog representation to a digital representation to generate a single digitized signal;

a de-multiplexer, coupled to an output of the ADC, configured to de-interleave the single digitized signal into a plurality of data streams;

a demodulator circuit, coupled to an output of the de-multiplexer, configured to generate a plurality of digital outputs based on the single data stream;

an error detection circuit, coupled to an output of the demodulator circuit, configured to generate an error signal; and

an oscillator circuit comprising an oscillator, wherein the oscillator circuit is coupled to an output of the error detection circuit and to an input of the down-conversion circuit, and wherein the oscillator circuit is configured to;

receive the error signal and a desired frequency,

adjust a frequency of the oscillator based on the desired frequency, and

adjust a quadrature component of the local oscillator signal based on the error signal.

25. The tuner of claim 24, wherein the error signal comprises a frequency error in the plurality of down-converted quadrature components.