Liquid crystal display panel and black picture insertion method for the panel displayed in 3D mode
First Claim
1. A liquid crystal display panel, comprising:
- multiple data lines;
multiple scanning lines;
multiple pixels, each pixel connected with a corresponding one of the data lines and a corresponding one of the scanning lines; and
multiple control transistors;
wherein, a gate electrode of each control transistor is connected with a same scanning line;
a source electrode of each control transistor is connected with a corresponding one of the data lines;
each of the control transistors has a drain electrode, and the drain electrodes are directly connected with each other;
wherein, each of the multiple pixels comprises a pixel transistor, a storage capacitor, and a liquid crystal capacitor;
a gate electrode of each pixel transistor is connected with a corresponding one of the scanning lines;
a source electrode of each pixel transistor is connected with a corresponding one of the data lines;
terminals of each storage capacitor and each liquid crystal capacitor are both connected with a drain electrode of each pixel transistor;
the other terminals of each storage capacitor and each liquid crystal capacitor are both connected with a common electrode; and
wherein, the multiple control transistors are disposed outside the multiple pixels;
wherein, the drain electrode of each control transistor connects with a common electrode;
wherein, in a blank time domain of a (2n)th frame, the multiple control transistors and the multiple pixel transistors are all turned on such that all data lines are connected with the common electrode through the multiple control transistors so as to display a black picture, wherein, n is a positive integer; and
wherein, a scanning sequence of a (2n−
1)th frame and a scanning sequence of the (2n)th frame are inverse such that a left eye can see a complete 3D image.
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Abstract
An LCD panel includes multiple data lines, multiple scanning lines, multiple pixels, and multiple control transistors. Each pixel connected with a corresponding one of the data lines and one of the scanning lines. Gate electrodes of the control transistors are connected with a same scanning line. A source electrode of each control transistor is connected with a corresponding one of the data lines. Drain electrodes of the control transistors are connected with each other. A black picture insertion method for the LCD panel displayed in a 3D mode is also disclosed. Accordingly, a refresh frequency of the driving circuit is one half of the prior art. The power consumption and cost are reduced. Besides, a black picture is inserted into one frame during a blank time domain of the one frame such that the brightness is increased and the charge time of the liquid crystal capacitor is increased.
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Citations
5 Claims
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1. A liquid crystal display panel, comprising:
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multiple data lines; multiple scanning lines; multiple pixels, each pixel connected with a corresponding one of the data lines and a corresponding one of the scanning lines; and multiple control transistors; wherein, a gate electrode of each control transistor is connected with a same scanning line;
a source electrode of each control transistor is connected with a corresponding one of the data lines;
each of the control transistors has a drain electrode, and the drain electrodes are directly connected with each other;wherein, each of the multiple pixels comprises a pixel transistor, a storage capacitor, and a liquid crystal capacitor;
a gate electrode of each pixel transistor is connected with a corresponding one of the scanning lines;
a source electrode of each pixel transistor is connected with a corresponding one of the data lines;
terminals of each storage capacitor and each liquid crystal capacitor are both connected with a drain electrode of each pixel transistor;
the other terminals of each storage capacitor and each liquid crystal capacitor are both connected with a common electrode; andwherein, the multiple control transistors are disposed outside the multiple pixels; wherein, the drain electrode of each control transistor connects with a common electrode; wherein, in a blank time domain of a (2n)th frame, the multiple control transistors and the multiple pixel transistors are all turned on such that all data lines are connected with the common electrode through the multiple control transistors so as to display a black picture, wherein, n is a positive integer; and wherein, a scanning sequence of a (2n−
1)th frame and a scanning sequence of the (2n)th frame are inverse such that a left eye can see a complete 3D image. - View Dependent Claims (2)
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3. A black picture insertion method for a liquid crystal display panel when displaying in a three-dimension (3D) mode, wherein, the liquid crystal display panel includes:
- multiple data lines;
multiple scanning lines;
multiple pixels, each pixel connected with a corresponding one of the data lines and a corresponding one of the scanning lines; and
multiple control transistors;
wherein a gate electrode of each control transistor is connected with a same scanning line;
a source electrode of each control transistor is connected with a corresponding one of the data lines;
each of the control transistors has a drain electrode, and the drain electrodes are directly connected with each other;wherein, each of the multiple pixels comprises a pixel transistor, a storage capacitor, and a liquid crystal capacitor;
a gate electrode of each pixel transistor is connected with a corresponding one of the scanning lines;
a source electrode of each pixel transistor is connected with a corresponding one of the data lines;
terminals of each storage capacitor and each liquid crystal capacitor are both connected with a drain electrode of each pixel transistor;
the other terminals of each storage capacitor and each liquid crystal capacitor are both connected with a common electrode;wherein, the multiple control transistors are disposed outside the multiple pixels; and wherein, the black picture insertion method comprises;
turning on all of the control transistors and pixel transistors in a blank time domain of a (2n)th frame, wherein, n is a positive integer; andwherein, a scanning sequence of a (2n−
1)th frame and a scanning sequence of the (2n)th frame are inverse such that a left eye can see a complete 3D image. - View Dependent Claims (4, 5)
- multiple data lines;
Specification