Strained isolation regions
First Claim
1. A method of forming a semiconductor device, the method comprising:
- forming an isolation trench in a substrate, the isolation trench having sidewalls and a bottom;
forming an isolation material in the isolation trench, the isolation material extending between and directly contacting the sidewalls of the isolation trench and being recessed below a surface of the substrate such that an upper portion of the sidewalls is exposed, the isolation material having a planar top surface, the planar top surface being recessed below the surface of the substrate at a first depth;
after the isolation material is recessed below the surface of the substrate, forming a transistor on the substrate, comprising;
when the upper portion of the sidewalls is exposed, forming a gate dielectric layer, andforming a gate electrode layer over the gate dielectric layer, wherein after forming the transistor the planar top surface is recessed below the surface of the substrate at a second depth, the second depth being substantially the same as the first depth; and
after forming the transistor, forming a stress layer over the substrate and the isolation material.
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Abstract
A method of forming an isolation trench having localized stressors is provided. In accordance with embodiments of the present invention, a trench is formed in a substrate and partially filled with a dielectric material. In an embodiment, the trench is filled with a dielectric layer and a planarization step is performed to planarize the surface with the surface of the substrate. The dielectric material is then recessed below the surface of the substrate. In the recessed portion of the trench, the dielectric material may remain along the sidewalls or the dielectric material may be removed along the sidewalls. A stress film, either tensile or compressive, may then be formed over the dielectric material within the recessed portion. The stress film may also extend over a transistor or other semiconductor structure.
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Citations
20 Claims
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1. A method of forming a semiconductor device, the method comprising:
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forming an isolation trench in a substrate, the isolation trench having sidewalls and a bottom; forming an isolation material in the isolation trench, the isolation material extending between and directly contacting the sidewalls of the isolation trench and being recessed below a surface of the substrate such that an upper portion of the sidewalls is exposed, the isolation material having a planar top surface, the planar top surface being recessed below the surface of the substrate at a first depth; after the isolation material is recessed below the surface of the substrate, forming a transistor on the substrate, comprising; when the upper portion of the sidewalls is exposed, forming a gate dielectric layer, and forming a gate electrode layer over the gate dielectric layer, wherein after forming the transistor the planar top surface is recessed below the surface of the substrate at a second depth, the second depth being substantially the same as the first depth; and after forming the transistor, forming a stress layer over the substrate and the isolation material. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method of forming a semiconductor device, the method comprising:
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forming a trench in a substrate; forming a dielectric layer in the trench; recessing the dielectric layer in the trench, the recessing forming a recess with reference to a major surface of the substrate, an upper surface of the dielectric layer being planar, the upper surface having a depth below the major surface of the substrate; after recessing the dielectric layer, forming a transistor on the substrate, the transistor comprising a gate dielectric layer and a source/drain region interposed between the gate dielectric layer and the trench, the gate dielectric layer being formed after a bottom of the recess is below the major surface of the substrate, a lowermost surface of the source/drain region being above the upper surface of the dielectric layer; and forming a stress layer over the substrate and the dielectric layer in the recess, the stress layer contacting a sidewall of the substrate in the trench, the stress layer extending over the major surface of the substrate. - View Dependent Claims (8, 9, 10, 11, 12, 13, 14)
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15. A method of forming a semiconductor device, the method comprising:
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forming a trench in a substrate, the substrate having a first major surface; forming a first dielectric layer over the substrate, the first dielectric layer substantially filling the trench; planarizing the substrate such that the first major surface of the substrate and a second major surface of the first dielectric layer are co-planar; recessing the first dielectric layer in the trench from the first major surface of the substrate, the first dielectric layer having a planar surface extending from a first sidewall of the trench to a second sidewall of the trench, a first portion of the first sidewall and a second portion of the second sidewall being exposed, the planar surface having a first depth below the first major surface of the substrate; when the first portion of the first sidewall and the second portion of the second sidewall are exposed, forming a transistor on the substrate, the transistor comprising a gate electrode layer and a S/D region, the gate electrode layer being formed after the planar surface of the first dielectric layer is below the first major surface of the substrate, the S/D region adjacent to the first portion of the first sidewall, the S/D region having a second depth below the first major surface of the substrate, wherein the first depth is lower than the second depth; and after forming the transistor, forming a stress layer over the substrate and the first dielectric layer, the stress layer in direct contact with the planar surface of the first dielectric layer and one of the first sidewall and the second sidewall of the trench. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification