Method for manufacturing semiconductor device

• US 9,564,517 B2
• Filed: 05/20/2014
• Issued: 02/07/2017
• Est. Priority Date: 10/23/2007
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Hosoya, Kunio, Fujikawa, Saishi, Chiba, Yoko
• Primary Examiner(s): JUNGE, BRYAN R.
• Application Number:
  US14/282,593
• Publication Number:
  US 20140256095A1
• Time in Patent Office: 994 Days
• Field of Search: 438/160
• US Class Current: 1/1
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate

Abstract

To provide a manufacturing method of a highly reliable TFT, by which a more refined pattern can be formed through a process using four or three masks, and a semiconductor device. A channel-etched bottom gate TFT structure is adopted in which a photoresist is selectively exposed to light by rear surface exposure utilizing a gate wiring to form a desirably patterned photoresist, and further, a halftone mask or a gray-tone mask is used as a multi-tone mask. Further, a step of lifting off using a halftone mask or a gray-tone mask and a step of reflowing a photoresist are used.

Claims

1. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode;

forming a wiring;

forming a gate insulating film over the gate electrode and the wiring;

forming a semiconductor layer over the gate insulating film;

performing first rear surface exposure to form a first photoresist over the semiconductor layer;

etching the semiconductor layer using the first photoresist to form a semiconductor island;

forming an electrode over the semiconductor island;

forming a second photoresist over and in contact with the semiconductor island and the electrode by using a multi-tone mask;

exposing a top surface of the wiring by etching part of the gate insulating film using the second photoresist;

exposing a top surface of the gate insulating film by ashing the second photoresist;

forming a transparent conductive film over the second photoresist subjected to the ashing;

removing the second photoresist and the transparent conductive film formed over the second photoresist together to form a pixel electrode;

forming an insulating layer over the pixel electrode;

performing second rear surface exposure to form a third photoresist over the insulating layer;

performing a reflow process on the third photoresist; and

etching the insulating layer using the third photoresist subjected to the reflow process,

wherein the second photoresist subjected to the ashing is formed over and in direct contact with a first part of the gate insulating film, and

wherein the first part of the gate insulating film is exposed by etching the insulating layer.

2. The method for manufacturing a semiconductor device, according to claim 1, wherein the first rear surface exposure is performed through the semiconductor layer.

3. The method for manufacturing a semiconductor device, according to claim 1, wherein the second rear surface exposure is performed through the insulating layer.

4. The method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor layer is an amorphous semiconductor layer.

5. The method for manufacturing a semiconductor device according to claim 1, wherein the insulating layer comprises at least one of silicon nitride and silicon oxide.

6. The method for manufacturing a semiconductor device according to claim 1, wherein the electrode is a source electrode or a drain electrode.

7. The method for manufacturing a semiconductor device according to claim 1, wherein the gate electrode and the electrode overlap each other.

8. The method for manufacturing a semiconductor device according to claim 1, wherein the pixel electrode is a transparent electrode.

9. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode;

forming a wiring;

forming a gate insulating film over the gate electrode and the wiring;

forming a first semiconductor layer over the gate insulating film;

forming a second semiconductor layer over the first semiconductor layer;

performing first rear surface exposure to form a first photoresist over the second semiconductor layer;

etching the first semiconductor layer and the second semiconductor layer using the first photoresist to form a first semiconductor island and a second semiconductor island;

forming an electrode over the first semiconductor island and the second semiconductor island;

forming a second photoresist over and in contact with the second semiconductor island and the electrode by using a multi-tone mask;

exposing a top surface of the wiring by etching part of the gate insulating film using the second photoresist;

exposing a top surface of the gate insulating film by ashing the second photoresist;

forming a transparent conductive film over the second photoresist subjected to the ashing;

removing the second photoresist and the transparent conductive film formed over the second photoresist together to form a pixel electrode;

forming an insulating layer over the pixel electrode;

performing second rear surface exposure to form a third photoresist over the insulating layer;

performing a reflow process on the third photoresist; and

etching the insulating layer using the third photoresist subjected to the reflow process,

wherein the second photoresist subjected to the ashing is formed over and in direct contact with a first part of the gate insulating film, and

wherein the first part of the gate insulating film is exposed by etching the insulating layer.

10. The method for manufacturing a semiconductor device, according to claim 9, wherein the first rear surface exposure is performed through the first semiconductor layer and the second semiconductor layer.

11. The method for manufacturing a semiconductor device, according to claim 9, wherein the second rear surface exposure is performed through the insulating layer.

12. The method for manufacturing a semiconductor device according to claim 9, wherein each of the first semiconductor layer and the second semiconductor layer is an amorphous semiconductor layer.

13. The method for manufacturing a semiconductor device according to claim 9, wherein the insulating layer comprises at least one of silicon nitride and silicon oxide.

14. The method for manufacturing a semiconductor device according to claim 9, wherein the electrode is a source electrode or a drain electrode.

15. The method for manufacturing a semiconductor device according to claim 9, wherein the gate electrode and the electrode overlap each other.

16. The method for manufacturing a semiconductor device according to claim 9, wherein the pixel electrode is a transparent electrode.