Protection of the execution of an algorithm against side-channel attacks

• US 9,565,016 B2
• Filed: 10/22/2014
• Issued: 02/07/2017
• Est. Priority Date: 10/23/2013
• Status: Active Grant

• Current Assignee: STMicroelectronics International N.V. (STMicroelectronics NV)
• Original Assignee: Proton World International N.V. (STMicroelectronics NV)
• Inventors: Wostyn, Alexandre, Modave, Jean-Louis
• Primary Examiner(s): Zecher, Dede
• Assistant Examiner(s): LAKHIA, VIRAL S
• Application Number:
  US14/521,150
• Publication Number:
  US 20150110265A1
• Time in Patent Office: 839 Days
• Field of Search: 380/28, 380/270, 380/260, 713190-192, 726/34, 326/4
• US Class Current: 1/1
• CPC Class Codes: G06F 12/1408 by using cryptography for digital transmission H04L9/00
• CPC Class Codes: G06F 21/72 in cryptographic circuits
• CPC Class Codes: G06F 21/755 with measures against power attack
• CPC Class Codes: G06F 21/77 in smart cards
• CPC Class Codes: H04L 2209/26 Testing cryptographic entity, e.g. testing integrity of encryption key or encryption algorithm
• CPC Class Codes: H04L 9/003 for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA]

Abstract

A protection mechanism for the execution of an encryption algorithm is disclosed. In the mechanism the encryption algorithm has its execution preceded by an update of a counter stored in a reprogrammable non-volatile memory. Storing the value of the counter into the memory corresponds with the execution of the algorithm.

Claims

1. A method to protect execution of an encryption algorithm, comprising:

updating a counter before execution of the encryption algorithm, the counter configured for storage in a reprogrammable non-volatile memory; and

storing a value of the counter into the reprogrammable non-volatile memory during execution of the encryption algorithm, wherein the storing includes;

activating a write function of the reprogrammable non-volatile memory;

writing a value of the counter in the reprogrammable non-volatile memory, the writing of the value corresponding with beginning execution of the encryption algorithm or after execution of the encryption algorithm begins; and

deactivating the write function of the memory.

2. The method of claim 1 wherein

execution of the encryption algorithm:

occurs

between the activating and deactivating.

3. The method of claim 1 wherein the encryption algorithm is an AES algorithm.

4. The method of claim 2, comprising:

analyzing power consumption of a circuit performing the activating, the writing, the executing, and the deactivating.

5. The method of claim 4 wherein analyzing the circuit power consumption includes executing a simple power analysis (SPA) or executing a differential power analysis (DPA).

6. The method of claim 1, comprising:

verifying the value is within a threshold before executing the encryption algorithm; and

prohibiting the act of executing the encryption algorithm if the value is outside of the threshold.

7. An encryption algorithm execution circuit, comprising:

a reprogrammable non-volatile memory;

a counting circuit wherein a count value produced by the counting circuit is storable in the reprogrammable non-volatile memory; and

a processing unit to execute an encryption algorithm, the processing unit configured to enable a write function in the reprogrammable non-volatile memory, concurrently execute the encryption algorithm and store the storable count value in the reprogrammable nonvolatile memory, and disable the write function in the reprogrammable non-volatile memory,

wherein storing the storable count value in the reprogrammable non-volatile memory corresponds with beginning execution of the encryption algorithm or after execution of the encryption algorithm has begun.

8. The encryption algorithm execution circuit of claim 7 wherein the processing unit is configured to begin storing the count value and begin executing the encryption algorithm at about a same time.

9. The encryption algorithm execution circuit of claim 7 wherein a time between beginning to store the count value and beginning to execute the encryption algorithm is random.

10. The encryption algorithm execution circuit of claim 7 wherein an amount of time to complete storing the count value and an amount of time to execute the encryption algorithm is substantially equal.

11. The encryption algorithm execution circuit of claim 7 wherein the reprogrammable non-volatile memory is an EEPROM.

12. A method, comprising:

activating charge pump circuits of a reprogrammable non-volatile memory;

storing a valid count value in the reprogrammable non-volatile memory; and

concurrent with the storing, executing an encryption algorithm, wherein storing the valid count value in the reprogrammable non-volatile memory corresponds with beginning execution of the encryption algorithm or after execution of the encryption algorithm has begun; and

deactivating the write function of the memory.

13. The method of claim 12, comprising:

checking a first count value; and

based on the first count value, updating the first count value to produce the valid count value and permitting the activating, the storing, and the executing.

14. The method of claim 13, comprising:

if the first count value is outside a threshold, prohibiting the activating, the storing, and the executing.

15. The method of claim 12, comprising:

deactivating the charge pump circuits of the reprogrammable non-volatile memory.

16. The method of claim 12 wherein the encryption algorithm is an AES algorithm.

17. The method of claim 15 wherein the act of activating the charge pump circuits begins before executing the encryption algorithm and the act of deactivating the charge pump circuits ends after executing the encryption algorithm.

18. The method of claim 12 wherein the act of activating the charge pump circuits begins at a time t₁ and the act of executing the encryption algorithm begins at a time t₂ and wherein the time between t₁ and t₂ is a random time less than the time to execute the encryption algorithm.