High sensitivity satellite positioning system receiver

• US 9,568,609 B2
• Filed: 05/02/2014
• Issued: 02/14/2017
• Est. Priority Date: 05/13/2010
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Shah, Mayur N., Riley, Wyatt Thomas, Farmer, Dominic Gerard
• Primary Examiner(s): Liu, Harry
• Application Number:
  US14/268,676
• Publication Number:
  US 20140240173A1
• Time in Patent Office: 1,019 Days
• Field of Search: 342/357.64
• US Class Current: 1/1
• CPC Class Codes: G01S 19/235 Calibration of receiver components
• CPC Class Codes: G01S 19/246 involving long acquisition integration times, extended snapshots of signals or methods specifically directed towards weak signal acquisition
• CPC Class Codes: G01S 19/26 involving a sensor measurement for aiding acquisition or tracking

Abstract

An attenuated satellite positioning system (SPS) signal is acquired using long integration over multiple navigation data bits. To produce a stable internal clock signal to perform the long integration, an external clock signal is received from a highly stable source, such as a wireless communication base station or a nearby femtocell. An internal oscillator is driven at a desired frequency that is aligned with the scaled frequency of the external clock signal to produce the stable internal clock signal. The SPS signal is received and integrated for an extended period using the internal clock signal. Predicted SPS data may be received from an external source and used to perform coherent integration. Alternatively, non-coherent integration may be performed. Additionally, a motion sensor may be used to determine if there is motion relative to the external clock source or to compensate for Doppler errors in the external clock signal due to motion.

Claims

1. A method of acquiring a satellite positioning system (SPS) signal for a substantially stationary or semi-stationary device, the method comprising:

receiving an external clock signal through a wired or wireless interface;

adjusting a frequency of an oscillator to align the frequency of the oscillator with a scaled frequency of the external clock signal to generate an internal clock signal;

receiving an SPS signal;

receiving predicted SPS data through a wired interface; and

integrating the received SPS signal over multiple navigation data bits using the internal clock signal to acquire the SPS signal.

2. The method of claim 1, wherein the received SPS signal is coherently integrated using the received predicted SPS data.

3. The method of claim 2, wherein the received predicted SPS data includes a predicted value of navigation data bits in the SPS signal, the method further comprising performing a data wipe-off of the received SPS signal using the predicted value of the navigation data bits.

4. The method of claim 2, wherein the predicted SPS data is received through an Ethernet backhaul.

5. The method of claim 1, wherein the received SPS signal is non-coherently integrated.

6. A substantially stationary or semi-stationary device comprising:

a satellite positioning system (SPS) signal receiver that provides positioning data for the device;

a transceiver for receiving an external clock signal;

an internal clock;

a frequency controller coupled to the internal clock and the transceiver, the frequency controller adjusting a frequency of the internal clock to align the frequency of the internal clock with a scaled frequency of the external clock signal;

a processor coupled to the SPS signal receiver and the transceiver, and configured to receive a signal from the internal clock;

memory coupled to the processor;

a wired communication interface coupled to the processor and configured to receive predicted SPS data; and

software held in the memory and run in the processor to cause the processor to integrate a received SPS signal over multiple navigation data bits using the internal clock at the frequency when the device is stationary.

7. The device of claim 6, the software further causes the processor to coherently integrate the received SPS signal using the predicted SPS data.

8. The device of claim 7, wherein the predicted SPS data includes a predicted value of navigation data bits in the SPS signal, the software further causes the processor to perform a data wipe-off of the received SPS signal using the predicted value of the navigation data bits.

9. The device of claim 6, wherein the software causes the processor to non-coherently integrate the received SPS signal.

10. The device of claim 6, wherein the frequency controller is a phase-locked loop.

11. The device of claim 6, the transceiver comprising a wireless receiver configured for wireless reception of the external clock signal.

12. The device of claim 6, the transceiver comprising a wired interface configured for wired reception of the external clock signal.

13. A substantially stationary or semi-stationary device comprising:

means for receiving an external clock signal at the device, through a wired or wireless interface;

means for adjusting a frequency of an oscillator to align the frequency of the oscillator with a scaled frequency of the external clock signal to generate an internal clock signal;

means for receiving a satellite positioning system (SPS) signal;

means for receiving predicted SPS data through a wired interface;

means for integrating the received SPS signal over multiple navigation data bits using the internal clock signal to acquire the SPS signal when the device is stationary.

14. The device of claim 13, wherein the received SPS signal is coherently integrated using the received predicted SPS data.

15. The device of claim 14, further comprising means for performing a data wipe-off of the received SPS signal using the predicted SPS data.

16. The device of claim 13, wherein the received SPS signal is non-coherently integrated.

17. A computer-readable storage medium including program code stored thereon, comprising:

program code to integrate a received SPS signal over multiple navigation data bits using an internal clock that is adjusted to align a frequency of the internal clock with a scaled frequency of an external clock signal received through a wired or wireless interface of a substantially stationary or semi-stationary device.