Path selection to read or write data

• US 9,569,132 B2
• Filed: 07/11/2014
• Issued: 02/14/2017
• Est. Priority Date: 12/20/2013
• Status: Active Grant

• Current Assignee: Emc IP Holding Company LLC (Dell Technologies Inc.)
• Original Assignee: Emc IP Holding Company LLC (Dell Technologies Inc.)
• Inventors: Sadhukhan, Amrita, Borisov, Mikhail
• Primary Examiner(s): Chery, Mardochee
• Application Number:
  US14/329,336
• Publication Number:
  US 20150178011A1
• Time in Patent Office: 949 Days
• Field of Search: 711/170, 709/225, 710/38
• US Class Current: 1/1
• CPC Class Codes: G06F 3/0611 in relation to response time
• CPC Class Codes: G06F 3/0635 by changing the path, e.g. traffic rerouting, path reconfiguration
• CPC Class Codes: G06F 3/0689 Disk arrays, e.g. RAID, JBOD
• CPC Class Codes: G06F 9/5011 the resources being hardware resources other than CPUs, Servers and Terminals

Abstract

In one aspect, a method includes determining a number of read blocks pending for each path from a host to a logical device, determining a number of write blocks pending for each path from the host to the logical device, determining one or more factors associated with time for each path from the host to the logical device and selecting a path from the host to the logical device to read or write data using the number of read blocks pending, the number of write blocks pending and the one or more factors associated with time.

Claims

1. A method comprising:

determining a number of read blocks pending for each path from a host to a logical device;

determining a number of write blocks pending for each path from the host to the logical device;

determining one or more factors associated with time for each path from the host to the logical device, wherein determining one or more factors associated with time for each path comprises determining a weighted average time to read a single block for each path from the host to the logical device or a weighted average time to write a single block for each path from the host to the logical device, wherein determining a weighted average time to read a single block for each path comprises;

assigning weights to each of the N blocks read for the path including assigning larger weight to more recently read blocks,

generating weighted read times for each of the last N blocks read for the path by multiplying an actual reading time by the corresponding weight; and

calculating an average of the weighted read times; and

selecting a path from the host to the logical device to read or write data using the number of read blocks pending, the number of write blocks pending and the one or more factors associated with time.

2. The method of claim 1 wherein determining one or more factors associated with time for each path from the host to the logical device comprises:

determining a weighted average time to read a single block for each path from the host to the logical device; and

determining a weighted average time to write a single block for each path from the host to the logical device.

3. The method of claim 2 further comprising determining an expected wait time for each path from the host to the logical device using the weighted average time to read a single block and the weighted average time to write a single block;

wherein selecting the path from the host to the logical device comprises selecting a path with the least expected wait time.

4. The method of claim 2 wherein determining the weighted average time to read a single block for each path comprises determining a weighted average time to read a single block for last N blocks read, and

wherein determining a weighted average time to write a single block for each path comprises determining a weighted average time to write a single block for each path for last N blocks written, where N is an integer greater than 1.

5. The method of claim 2 wherein determining a total path weight comprises determining a product of a sum of the number of I/Os pending, the number of read blocks pending and the number of write blocks pending and a path weight of a path.

6. The method of claim 2 wherein:

determining a weighted average time to read a single block for each path comprises;

assigning read weights to each of the last N blocks read for the path;

generating weighted read times for each of the last N blocks read for the path by multiplying an actual read time by the corresponding read weight; and

calculating an average of the weighted read times; and

determining a weighted average time to write a single block for each path comprises;

assigning write weights to each of the last N blocks write for the path;

generating weighted write times for each of the last N blocks write for the path by multiplying an actual write time by the corresponding write weight; and

calculating an average of the weighted write times.

7. An apparatus, comprising:

electronic hardware circuitry configured to;

determine a number of read blocks pending for each path from a host to a logical device;

determine a number of write blocks pending for each path from the host to the logical device;

determine one or more factors associated with time for each path from the host to the logical device, wherein the one or more factors associated with time for each path comprise a weighted average time to read a single block for each path from the host to the logical device or a weighted average time to write a single block for each path from the host to the logical device, wherein determining a weighted average time to read a single block for each path comprises;

assigning weights to each of the last N blocks read for the path including assigning larger weights to more recently read blocks;

generating weight read times for each of the last N blocks read for the path by multiplying an actual reading time by the corresponding weight; and

calculating an average of the weighted read times; and

select a path from the host to the logical device to read or write data using the number of read blocks pending, the number of write blocks pending the one or more factors associated with time.

8. The apparatus of claim 7, wherein the circuitry comprises at least one of a processor, a memory, a programmable logic device or a logic gate.

9. The apparatus of claim 7 wherein the circuitry configured to determine one or more factors associated with time for each path from the host to the logical device comprises circuitry configured to:

determine a weighted average time to read a single block for each path from the host to the logical device; and

determine a weighted average time to write a single block for each path from the host to the logical device.

10. The apparatus of claim 9, further comprising circuitry configured to determine an expected wait time for each path from the host to the logical device using the weighted average time to read a single block and the weighted average time to write a single block,

wherein circuitry configured to select the path from the host to the logical device comprises circuitry configured to select a path with the least expected wait time.

11. The apparatus of claim 9

wherein the circuitry configured to determine the weighted average time to read a single block for each path comprises circuitry configured to determine a weighted average time to read a single block for last N blocks read, and

wherein the circuitry configured to determine a weighted average time to write a single block for each path comprises circuitry configured to determine a weighted average time to write a single block for each path for last N blocks written, where N is an integer greater than 1.

12. The apparatus of claim 7 wherein the circuitry configured to determine one or more factors associated with time for each path from the host to the logical device comprises circuitry configured to determine a total path weight using a blocks per time interval value, and

wherein the circuitry configured to select the path from the host to the logical device comprises circuitry configured to select a path with the least total path weight.

13. The apparatus of claim 12 wherein the circuitry configured to determine a total path weight comprises circuitry configured to determine a product of a sum of the number of Ms pending, the number of read blocks pending and the number of write blocks pending and a path weight of a path.

14. An article comprising:

a non-transitory computer-readable medium that stores computer-executable instructions, the instructions causing a machine to;

determine a number of read blocks pending for each path from a host to a logical device;

determine a number of write blocks pending for each path from the host to the logical device;

determine one or more factors associated with time for each path from the host to the logical device, wherein the one or more factors associated with time for each path comprise a weighted average time to read a single block for each path from the host to the logical device or a weighted average time to write a single block for each path from the host to the logical device, wherein determining a weighted average time to read a single book for each path comprises;

assigning weights to each of the last N blocks read for the path including assigning larger weights to more recently read blocks;

generating weighted read times for each of the last N blocks read for the path by multiplying an actual reading time by the corresponding weight; and

calculating an average of the weighted read times; and

select a path from the host to the logical device to read or write data using the number of read blocks pending, the number of write blocks pending the one or more factors associated with time.

15. The article of claim 14 wherein the instructions causing the machine to determine one or more factors associated with time for each path from the host to the logical device comprises instructions causing the machine to:

determine a weighted average time to read a single block for each path from the host to the logical device; and

determine a weighted average time to write a single block for each path from the host to the logical device.

16. The article of claim 15, further comprising instructions causing the machine to determine an expected wait time for each path from the host to the logical device using the weighted average time to read a single block and the weighted average time to write a single block,

wherein instructions causing the machine to select the path from the host to the logical device comprises instructions causing the machine to select a path with the least expected wait time.

17. The article of claim 15 wherein the instructions causing the machine to determine the weighted average time to read a single block for each path comprises instructions causing the machine to determine a weighted average time to read a single block for last N blocks read, and

wherein the instructions causing the machine to determine a weighted average time to write a single block for each path comprises instructions causing the machine to determine a weighted average time to write a single block for each path for last N blocks written, where N is an integer greater than 1.

18. The article of claim 17 wherein the instructions causing the machine to determine a total path weight comprises instructions causing the machine to determine a product of a sum of the number of I/Os pending, the number of read blocks pending and the number of write blocks pending and a path weight of a path.