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Secure boot with resistance to differential power analysis and other external monitoring attacks

  • US 9,569,623 B2
  • Filed: 02/09/2015
  • Issued: 02/14/2017
  • Est. Priority Date: 12/04/2009
  • Status: Active Grant
First Claim
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1. A computing device comprising:

  • secure storage hardware to store a secret value;

    additional storage hardware;

    processing hardware coupled to the secure storage hardware, the processing hardware comprising at least one of a cache or a memory; and

    an interface between the processing hardware and the additional storage hardware, wherein at least one of the additional storage hardware or the interface is unsecure;

    wherein during a secure boot process the processing hardware is to;

    receive untrusted data from the additional storage hardware via the interface;

    load the untrusted data into at least one of the cache or the memory of the processing hardware, the untrusted data comprising an encrypted data segment and a validator;

    retrieve the secret value from the secure storage hardware;

    derive an initial key using a path through a key tree based at least in part on an identifier associated with the encrypted data segment and the secret value;

    verify, using the validator, whether the encrypted data segment has been modified; and

    responsive to verifying that the encrypted data segment has not been modified, decrypt the encrypted data segment using a first decryption key derived from the initial key to produce a decrypted data segment.

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