Power amplifier with self aligned peaking stage

• US 9,571,056 B2
• Filed: 11/26/2014
• Issued: 02/14/2017
• Est. Priority Date: 11/26/2013
• Status: Active Grant

• Current Assignee: Qorvo US, Inc. (Qorvo, Inc.)
• Original Assignee: Qorvo US, Inc. (Qorvo, Inc.)
• Inventors: Scott, Baker, Maxim, George, Leipold, Dirk Robert Walter
• Primary Examiner(s): Chen, Junpeng
• Application Number:
  US14/554,746
• Publication Number:
  US 20150147986A1
• Time in Patent Office: 811 Days
• US Class Current: 1/1
• CPC Class Codes: H03F 1/0211 with control of the supply voltage or current
• CPC Class Codes: H03F 1/0272 by using a signal derived from the output signal
• CPC Class Codes: H03F 1/223 with MOSFET's
• CPC Class Codes: H03F 1/32 Modifications of amplifiers to reduce non-linear distortion by negative feedback H03F1/34
• CPC Class Codes: H03F 1/523 for amplifiers using field-effect devices H03F1/526 takes precedence
• CPC Class Codes: H03F 1/565 using inductive elements
• CPC Class Codes: H03F 2200/324 An amplitude modulator or demodulator being used in the amplifier circuit
• CPC Class Codes: H03F 2200/387 A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2200/471 the voltage being sensed
• CPC Class Codes: H03F 2201/3236 A generated signal, e.g. a pulse or an inverted synchronous signal, being added to avoid certain conditions, e.g. clipping
• CPC Class Codes: H03F 3/19 with semiconductor devices only
• CPC Class Codes: H03F 3/193 with field-effect devices H03F3/195 takes precedence
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H03F 3/45179 using MOSFET transistors as the active amplifying circuit H03F3/45278 takes precedence
• CPC Class Codes: H03F 3/45394 Pl types H03F3/45421, H03F3/45448 take precedence
• CPC Class Codes: H03F 3/68 Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics power amplifiers using a combination of several semiconductor amplifiers H03F3/211; combinations of amplifiers using coupling networks with distributed constants H03F3/602
• CPC Class Codes: H03G 3/3036 in high-frequency amplifiers or in frequency-changers H03G3/3052, H03G3/32, H03G3/34 take precedence
• CPC Class Codes: H03G 3/3042 in modulators, frequency-changers, transmitters or power amplifiers transmission power control in bidirectional transmission systems H04W52/04
• CPC Class Codes: H04B 1/0475 with means for limiting noise, interference or distortion H04B1/0483 takes precedence
• CPC Class Codes: H04B 2001/0408 : with power amplifiers
• CPC Class Codes: H04B 2001/0416 : having gain or transmission power control
• CPC Class Codes: H04B 2001/0425 : with linearisation using predistortion

Abstract

RF PA circuitry includes an amplifier stage, gain compensation circuitry, and an adder. The amplifier stage is configured to receive and amplify an RF input signal to provide an RF output signal. The gain compensation circuitry is coupled in parallel with the amplifier stage and configured to receive the RF input signal and provide a gain compensation signal, wherein the gain compensation signal is configured to linearize at least a portion of the gain response of the amplifier stage or the RF PA circuitry in general. The adder is coupled between an output of the amplifier stage and the gain compensation stage and is configured to receive and add the RF output signal and the gain compensation signal to provide a linearized RF output signal.

Claims

1. Radio frequency (RF) power amplifier (PA) circuitry comprising:

an amplifier stage configured to receive and amplify an RF input signal to provide an RF output signal;

gain compensation circuitry coupled in parallel with the amplifier stage and configured to receive the RF input signal and provide a gain compensation signal, wherein the gain compensation signal is configured to increase a range of RF input power of the RF input signal over which a gain response of the RF PA circuitry remains substantially constant;

an adder coupled between an output of the amplifier stage and the gain compensation circuitry and configured to receive and add the RF output signal and the gain compensation signal to provide a linearized RF output signal; and

capacitance compensation circuitry coupled to an input of each one of the amplifier stage and the gain compensation circuitry and configured to maintain an input capacitance of the amplifier stage at a constant value.

2. The RF PA circuitry of claim 1 wherein a gain response of the gain compensation circuitry is non-linear.

3. The RF PA circuitry of claim 1 wherein the gain compensation circuitry comprises:

offset adjustment circuitry configured to adjust a phase of the RF input signal to provide a phase-shifted RF signal; and

gain slope adjustment circuitry coupled in series with the offset adjustment circuitry and configured to adjust a gain slope of the phase-shifted RF signal to provide the gain compensation signal.

4. The RF PA circuitry of claim 3 wherein the gain slope adjustment circuitry is a variable gain amplifier.

5. The RF PA circuitry of claim 3 wherein the gain compensation signal is non-linear.

6. The RF PA circuitry of claim 3 further comprising gain compensation control circuitry coupled to the gain compensation circuitry and configured to adjust the offset adjustment circuitry and the gain slope adjustment circuitry to produce a desired gain response of the gain compensation circuitry.

7. The RF PA circuitry of claim 6 wherein the gain compensation control circuitry is configured to adjust one or more operating parameters of the offset adjustment circuitry and the gain slope adjustment circuitry based on a supply voltage delivered to the amplifier stage.

8. The RF PA circuitry of claim 6 wherein the gain compensation control circuitry is configured to adjust one or more operating parameters of the offset adjustment circuitry and the gain slope adjustment circuitry based on a bias signal provided to the amplifier stage.

9. The RF PA circuitry of claim 6 wherein the gain compensation control circuitry is configured to adjust one or more operating parameters of the offset adjustment circuitry and the gain slope adjustment circuitry based on a saturation characteristic of an output amplifier stage in the RF PA circuitry.

10. The RF PA circuitry of claim 6 wherein the gain compensation control circuitry is configured to adjust one or more operating parameters of the offset adjustment circuitry and the gain slope adjustment circuitry based on one or more of a process measurement, a temperature measurement, or a supply voltage measurement.

11. The RF PA circuitry of claim 1 further comprising gain compensation control circuitry coupled to the gain compensation circuitry and configured to provide one or more control signals to the gain compensation circuitry to produce a desired gain response of the gain compensation circuitry.

12. The RF PA circuitry of claim 11 wherein the gain compensation circuitry comprises:

offset adjustment circuitry configured to adjust an offset of the RF input signal based on a control signal provided by the gain compensation control circuitry to provide a phase-shifted RF signal; and

gain slope adjustment circuitry coupled in series with the offset adjustment circuitry and configured to adjust a slope of the phase-shifted RF signal based on a control signal provided by the gain compensation control circuitry to provide the gain compensation signal.

13. The RF PA circuitry of claim 12 wherein the gain slope adjustment circuitry is a variable gain amplifier.

14. The RF PA circuitry of claim 1 wherein the capacitance compensation circuitry comprises:

one or more varactors; and

capacitance compensation control circuitry configured to adjust the one or more varactors such that an input capacitance of the amplifier stage is maintained at a constant value.

15. The RF PA circuitry of claim 1 wherein the RF PA is a multi-stage RF PA and the amplifier stage is a driver stage of the multi-stage RF PA.

16. The RF PA circuitry of claim 1 wherein the RF PA is a multi-stage RF PA and the amplifier stage is an output stage of the multi-stage RF PA.

17. The RF PA circuitry of claim 1 wherein the RF PA circuitry further comprises an additional amplifier stage.

18. Radio frequency (RF) power amplifier (PA) circuitry comprising:

an amplifier stage configured to receive and amplify an RF input signal to provide an RF output signal;

gain compensation circuitry coupled in parallel with the amplifier stage and configured to receive the RF input signal and provide a gain compensation signal, wherein the gain compensation signal is configured to linearize at least a portion of a gain response of the amplifier stage;

an adder coupled between an output of the amplifier stage and the gain compensation circuitry and configured to receive and add the RF output signal and the gain compensation signal to provide a linearized RF output signal; and

capacitance compensation circuitry coupled to an input of each one of the amplifier stage and the gain compensation circuitry and configured to maintain an input capacitance of the amplifier stage at a constant value.

19. The RF PA circuitry of claim 18 wherein the capacitance compensation circuitry comprises:

one or more varactors; and

capacitance compensation control circuitry configured to adjust the one or more varactors such that the input capacitance of the amplifier stage is maintained at a constant value.

20. Radio frequency (RF) power amplifier (PA) circuitry comprising:

a driver amplifier stage configured to receive and amplify an RF input signal to provide an intermediate RF signal;

driver stage gain compensation circuitry coupled in parallel with the driver amplifier stage and configured to receive the RF input signal and provide a driver stage gain compensation signal, wherein the driver stage gain compensation signal is configured to linearize at least a portion of a gain response of the driver amplifier stage;

a driver stage adder coupled between an output of the driver amplifier stage and the driver stage gain compensation circuitry and configured to receive and add the intermediate RF signal and the driver stage gain compensation signal to provide a linearized intermediate RF signal;

an output amplifier stage configured to receive and amplify the linearized intermediate RF signal to provide an RF output signal;

output stage gain compensation circuitry coupled in parallel with the output amplifier stage and configured to receive the linearized intermediate RF signal and provide an output stage gain compensation signal, wherein the output stage gain compensation signal is configured to linearize at least a portion of the gain response of the output amplifier stage; and

an output stage adder coupled between an output of the output amplifier stage and the output stage gain compensation circuitry and configured to receive and add the RF output signal and the output stage gain compensation signal to provide a linearized RF output signal.

21. The RF PA circuitry of claim 20 wherein each of the driver stage gain compensation circuitry and the output stage gain compensation circuitry comprises:

offset adjustment circuitry configured to adjust an offset of an RF signal at an input of the gain compensation circuitry to provide a phase-shifted RF signal; and

gain slope adjustment circuitry coupled in series with the offset adjustment circuitry and configured to adjust a slope of the phase-shifted RF signal to provide a gain compensation signal.