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Half bridge driver circuits

  • US 9,571,093 B2
  • Filed: 10/07/2015
  • Issued: 02/14/2017
  • Est. Priority Date: 09/16/2014
  • Status: Active Grant
First Claim
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1. A half bridge GaN circuit, comprising:

  • a low side circuit, comprising;

    a low side switch having a low side switch control gate and a first source,a low side switch driver, comprising;

    a first low side switch driver input configured to receive a first logic signal, wherein the first logic signal is referenced to a voltage at the first source,a second low side switch driver input configured to receive a low side switch driver control signal,a first low side switch driver output connected to the low side switch control gate,a second low side switch driver output configured to transmit a level shift driver control signal, anda third low side switch driver output configured to transmit a second level shift input signal,a level shift driver, comprising;

    a first level shift driver input connected to a second logic signal, wherein the second logic signal is referenced to the voltage of the first source,a second level shift driver input configured to receive the level shift driver control signal from the second low side switch driver output,a first level shift driver output, configured to transmit the low side switch driver control signal to the second low side switch driver input, anda second level shift driver output, configured to transmit a first level shift input signal,a first level shift circuit configured to receive the first level shift input signal and to generate a first level shift signal, anda second level shift circuit configured to receive the second level shift input signal and to generate a second level shift signal; and

    a high side circuit, comprising;

    a high side switch having a high side switch control gate and a second source,a first high side receiver circuit referenced to a voltage at the second source and configured to receive the first level shift signal and to generate a first high side driver control signal,a second high side receiver circuit referenced to the voltage of the second source and configured to receive the second level shift signal and to generate a second high side driver control signal, anda high side switch driver referenced to the voltage of the second source, wherein the high side switch driver comprises;

    one or more logic inputs configured to receive the first and second high side driver control signals, anda high side switch driver output connected to the high side switch control gate,wherein the first and second high side receiver circuits are configured to prevent a change of voltage state of the high side control gate in response to voltage transients of the voltage of the second source.

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