Printing complex electronic circuits
First Claim
1. A circuit comprising:
- a substrate;
a plurality of separate groups of pre-formed, semiconductor electrical devices that have been mixed in a solution, deposited over the substrate, and cured,each group containing a plurality of substantially identical electrical devices connected in parallel within each group, all electrical devices connected in parallel forming a single group,all electrical devices connected in parallel in each group forming a random two-dimensional arrangement of the electrical devices on the substrate,wherein a total number of electrical devices connected in parallel within each group is random,wherein the electrical devices connected in parallel within each group are not aligned with each other in any predetermined way;
an interconnection conductor pattern that interconnects at least some of the groups together to achieve an electrical logic function;
at least one input terminal connected to the interconnection conductor pattern for receiving input signals for transformation by the electrical logic function to generate output signals; and
at least one output terminal connected to the interconnection conductor pattern for receiving the output signals.
2 Assignments
0 Petitions
Accused Products
Abstract
A programmable circuit includes an array of printed groups of microscopic transistors or diodes. The devices are pre-formed and printed as an ink and cured. The devices in each group are connected in parallel so that each group acts as a single device. In one embodiment, about 10 devices are contained in each group so the redundancy makes each group very reliable. Each group has at least one electrical lead that terminates in a patch area on the substrate. An interconnection conductor pattern interconnects at least some of the leads of the groups in the patch area to create logic circuits for a customized application of the generic circuit. The groups may also be interconnected to be logic gates, and the gate leads terminate in the patch area. The interconnection conductor pattern then interconnects the gates for form complex logic circuits.
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Citations
15 Claims
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1. A circuit comprising:
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a substrate; a plurality of separate groups of pre-formed, semiconductor electrical devices that have been mixed in a solution, deposited over the substrate, and cured, each group containing a plurality of substantially identical electrical devices connected in parallel within each group, all electrical devices connected in parallel forming a single group, all electrical devices connected in parallel in each group forming a random two-dimensional arrangement of the electrical devices on the substrate, wherein a total number of electrical devices connected in parallel within each group is random, wherein the electrical devices connected in parallel within each group are not aligned with each other in any predetermined way; an interconnection conductor pattern that interconnects at least some of the groups together to achieve an electrical logic function; at least one input terminal connected to the interconnection conductor pattern for receiving input signals for transformation by the electrical logic function to generate output signals; and at least one output terminal connected to the interconnection conductor pattern for receiving the output signals. - View Dependent Claims (2, 3, 4, 5, 6, 11, 12, 13, 14, 15)
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7. A circuit comprising:
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a substrate; a plurality of separate groups of pre-formed, semiconductor electrical devices that have been mixed in a solution, deposited over the substrate, and cured, each group containing a plurality of substantially identical electrical devices connected in parallel within each group, the electrical devices being randomly distributed within each group on the substrate; an interconnection conductor pattern that interconnects at least some of the groups together to achieve an electrical logic function; at least one input terminal connected to the interconnection conductor pattern for receiving input signals for transformation by the electrical logic function to generate output signals; and at least one output terminal connected to the interconnection conductor pattern for receiving the output signals, wherein the devices are 3-terminal devices having a first electrode, a second electrode, and a third electrode, wherein the first electrode is a bottom electrode of the devices, the third electrode is a top electrode of the devices, and the second electrode is an intermediate electrode located vertically between the top electrode and the bottom electrode, the circuit further comprising; a first conductor layer over the substrate, wherein the first electrode of the devices is electrically connected to the first conductor layer; a first dielectric layer overlying the first conductor layer; a second conductor layer overlying the first dielectric layer to electrically contact the second electrode; and a second dielectric layer over the second conductor layer; and a third conductor layer overlying the second dielectric layer to electrically contact the third electrode, wherein the devices are electrically connected in parallel by a combination of the first conductor layer, the second conductor layer, and the third conductor layer. - View Dependent Claims (8, 9, 10)
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Specification