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Measurement of signal delays in microprocessor integrated circuits with sub-picosecond accuracy using frequency stepping

  • US 9,575,119 B1
  • Filed: 02/10/2016
  • Issued: 02/21/2017
  • Est. Priority Date: 10/14/2015
  • Status: Active Grant
First Claim
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1. A method of measuring a delay of an edge of a first signal with respect to an edge of a second signal within an integrated circuit, the method comprising:

  • controlling a frequency of a clock signal of the integrated circuit from which the first signal and the second signal are synchronously derived;

    within the integrated circuit, first propagating the edge of the first signal through a tapped delay line;

    within the integrated circuit, first capturing first tap positions of the edge of the first signal over multiple first measurements;

    first computing a first average of the first tap positions of the edge of the first signal, wherein the controlling controls the frequency of the clock signal to determine a first frequency for which the first average of the first tap positions lies at a boundary between a pair of adjacent tap positions of the tapped delay line;

    within the integrated circuit, second propagating an edge of the second signal through the tapped delay line;

    within the integrated circuit, second capturing second tap positions of the edge of the second signal over multiple second measurements;

    second computing an average of the second tap positions of the edge of the second signal, wherein the controlling controls the frequency of the clock signal to determine a second frequency for which the second average of the second tap positions lies at the boundary between the pair of adjacent tap positions of the tapped delay line; and

    computing the delay as a difference between the periods of the first frequency and the second frequency.

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