Integrated circuit and operation method thereof
First Claim
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1. An integrated circuit, comprising:
- a voltage detecting unit configured to detect a system voltage and correspondingly output a voltage state signal;
a central processing unit having at least one register, coupled to the voltage detecting unit for receiving the system voltage, and configured to determine whether to start operating according to the voltage state signal;
a memory unit; and
a control unit coupled to the voltage detecting unit, the central processing unit and the memory unit, and configured to receive the voltage state signal and the system voltage, and when the system voltage is downed to a voltage level lower than or equal to a brown-out voltage and greater than a reset low voltage, the central processing unit entering an idle state and the control unit storing values of the at least one register into the memory unit,wherein, during the idle state, the control unit reads the values of the at least one register stored in the memory unit and writes the reading values of the at least one register into the at least one register when the system voltage is upped to the voltage level greater than the reset low voltage and lower than or equal to the brown-out voltage.
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Abstract
An integrated circuit and an operation method thereof are provided. The integrated circuit includes a voltage detecting unit, a central processing unit, a memory unit and a control unit. The voltage detecting unit detects a system voltage and correspondingly outputs a voltage state signal. The central processing unit has at least one register. When the system voltage is downed to a voltage level lower than or equal to a brown-out voltage and greater than a reset low voltage, the control unit stores values of the registers into the memory unit.
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Citations
19 Claims
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1. An integrated circuit, comprising:
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a voltage detecting unit configured to detect a system voltage and correspondingly output a voltage state signal; a central processing unit having at least one register, coupled to the voltage detecting unit for receiving the system voltage, and configured to determine whether to start operating according to the voltage state signal; a memory unit; and a control unit coupled to the voltage detecting unit, the central processing unit and the memory unit, and configured to receive the voltage state signal and the system voltage, and when the system voltage is downed to a voltage level lower than or equal to a brown-out voltage and greater than a reset low voltage, the central processing unit entering an idle state and the control unit storing values of the at least one register into the memory unit, wherein, during the idle state, the control unit reads the values of the at least one register stored in the memory unit and writes the reading values of the at least one register into the at least one register when the system voltage is upped to the voltage level greater than the reset low voltage and lower than or equal to the brown-out voltage. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. An operation method of an integrated circuit, comprising:
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determining whether a system voltage provided to a central processing unit is downed to or upped to a voltage level greater than a reset low voltage and lower than or equal to a brown-out voltage; storing a part or all of values of the at least one register of the central processing unit into a memory unit and then entering an idle state when the system voltage is downed to the voltage level lower than or equal to the brown-out voltage and greater than the reset low voltage; and writing the part or all of the values of the at least one register stored in the memory unit into the at least one register when the system voltage is upped to the voltage level greater than the reset low voltage and lower than or equal to the brown-out voltage. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18)
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19. An operation method of an integrated circuit, comprising:
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determining whether a central processing unit is in an idle state; determining whether a system voltage provided to the central processing unit is downed to or upped to a voltage level greater than a reset low voltage and lower than or equal to a brown-out voltage when the central processing unit is in the idle state; storing values of a plurality of registers of the central processing unit into a memory unit when the system voltage is downed to the voltage level lower than or equal to the brown-out voltage and greater than the reset low voltage; and during the idle state, writing the values of the registers stored in the memory unit into the registers when the system voltage is upped to the voltage level greater than the reset low voltage and lower than or equal to the brown-out voltage and a pre-read operation is executed.
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Specification