Method of spacer patterning to form a target integrated circuit pattern
First Claim
1. A method of forming a target pattern for an integrated circuit, the method comprising:
- providing a patterned first spacer layer over a substrate;
forming a second spacer layer over the substrate, over the patterned first spacer layer, and onto sidewalls of the patterned first spacer layer; and
forming a patterned material layer over the second spacer layer with a second mask, whereby the patterned material layer and the second spacer layer collectively define a plurality of trenches, and wherein the second spacer layer remains formed over the patterned first spacer layer and on the sidewalls of the patterned first spacer layer after the plurality of trenches are defined.
2 Assignments
0 Petitions
Accused Products
Abstract
A method of forming a target pattern includes forming a plurality of lines over a substrate with a first mask and forming a first spacer layer over the substrate, over the plurality of lines, and onto sidewalls of the plurality of lines. The plurality of lines is removed, thereby providing a patterned first spacer layer over the substrate. The method further includes forming a second spacer layer over the substrate, over the patterned first spacer layer, and onto sidewalls of the patterned first spacer layer, and forming a patterned material layer over the second spacer layer with a second mask. Whereby, the patterned material layer and the second spacer layer collectively define a plurality of trenches.
1664 Citations
20 Claims
-
1. A method of forming a target pattern for an integrated circuit, the method comprising:
-
providing a patterned first spacer layer over a substrate; forming a second spacer layer over the substrate, over the patterned first spacer layer, and onto sidewalls of the patterned first spacer layer; and forming a patterned material layer over the second spacer layer with a second mask, whereby the patterned material layer and the second spacer layer collectively define a plurality of trenches, and wherein the second spacer layer remains formed over the patterned first spacer layer and on the sidewalls of the patterned first spacer layer after the plurality of trenches are defined. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
-
-
14. A method comprising:
-
providing a patterned first material over a substrate, the substrate including a plurality of hard mask layers; depositing a second material to a second thickness over the substrate, over the patterned first material, and onto sidewalls of the patterned first material; depositing a third material over the second material; and patterning the second and third materials to form trenches, wherein the second material remains deposited over the patterned first material and on the sidewalls of the patterned first material. - View Dependent Claims (15, 16, 17)
-
-
18. A method of forming a target pattern for an integrated circuit, the method comprising:
-
decomposing the target pattern to at least a first mask, the first mask having a first mask pattern, and a second mask, the second mask having a second mask pattern, wherein at least a portion of the first mask pattern overlaps with at least a portion of the second mask pattern; providing a patterned first spacer layer over a substrate; forming a second spacer layer over the substrate, over the patterned first spacer layer, and onto the sidewalls of the patterned first spacer layer; forming a first material layer over the second spacer layer; and patterning the first material layer with the second mask wherein the second spacer layer and the patterned first material layer collectively define a second plurality of features. - View Dependent Claims (19, 20)
-
Specification