Method and system for universal target based inspection and metrology

• US 9,576,861 B2
• Filed: 11/18/2013
• Issued: 02/21/2017
• Est. Priority Date: 11/20/2012
• Status: Active Grant

• Current Assignee: KLA-Tencor Corporation (KLA Corporation)
• Original Assignee: KLA-Tencor Corporation (KLA Corporation)
• Inventors: Park, Allen, Chang, Ellis, Adel, Michael, Bhaskar, Kris, Levy, Ady, Widmann, Amir, Wagner, Mark, Rong, Songnian
• Primary Examiner(s): Alam, Mohammed
• Application Number:
  US14/083,126
• Publication Number:
  US 20140199791A1
• Time in Patent Office: 1,191 Days
• Field of Search: 716/136
• US Class Current: 1/1
• CPC Class Codes: G06F 30/398 Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] optical proximity correction [OPC] design processes G03F1/36
• CPC Class Codes: H01L 22/12 for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions electrical measurement of diffusions H01L22/14

Abstract

Universal target based inspection drive metrology includes designing a plurality of universal metrology targets measurable with an inspection tool and measurable with a metrology tool, identifying a plurality of inspectable features within at least one die of a wafer using design data, disposing the plurality of universal targets within the at least one die of the wafer, each universal target being disposed at least proximate to one of the identified inspectable features, inspecting a region containing one or more of the universal targets with an inspection tool, identifying one or more anomalistic universal targets in the inspected region with an inspection tool and, responsive to the identification of one or more anomalistic universal targets in the inspected region, performing one or more metrology processes on the one or more anomalistic universal metrology targets with the metrology tool.

Claims

1. A method for in-die metrology comprising:

designing a plurality of universal metrology targets, wherein at least some of the universal metrology targets are measurable with a metrology tool and an inspection tool;

identifying a plurality of inspectable features within at least one die of a wafer using design data;

disposing the plurality of universal targets within the at least one die of the wafer, each universal target being disposed at least proximate to one of the identified inspectable features;

inspecting a region containing one or more of the universal targets with an inspection tool;

identifying one or more anomalistic universal metrology targets in the inspected region with an inspection tool, wherein the one or more anomalistic universal metrology targets display an inspection parameter outside a selected inspection parameter range; and

responsive to the identification of one or more anomalistic universal metrology targets in the inspected region with the inspection tool, performing one or more metrology processes on the one or more anomalistic universal metrology targets with the metrology tool.

2. The method of claim 1, further comprising:

calibrating one or more inspection results of one or more universal metrology target structures with one or more results of the performed one or more metrology processes.

22. The system of claim 1, wherein the inspection tool is configured to identify one or more anomalistic inspection signals from one or more of the plurality of universal targets in the inspected region.

3. A system for in-die metrology comprising:

a lithography tool configured to;

design a plurality of universal metrology targets, wherein at least some of the universal metrology targets are measurable with a metrology tool and an inspection tool;

identify a plurality of inspectable features within at least one die of a wafer using design data; and

dispose the plurality of universal targets within the at least one die of the wafer, each universal target being disposed at least proximate to one of the identified inspectable features;

an inspection tool configured to;

inspect a region containing one or more of the universal targets; and

identify one or more anomalistic universal targets in the inspected region with an inspection tool, wherein the one or more anomalistic universal metrology targets display an inspection parameter outside a selected inspection parameter range; and

a metrology tool configured to perform one or more metrology processes on the one or more anomalistic universal metrology targets in response to the identification of one or more anomalistic universal metrology targets in the inspected region with the inspection tool, wherein the lithography tool, the inspection tool and the metrology tool are communicatively coupled to a controller.

4. The system of claim 3, wherein the lithography tool is configured to design a plurality of universal metrology targets configured to satisfy a design for manufacturability (DFM) requirement of one or more devices fabricated on the wafer.

5. The system of claim 3, wherein the lithography tool is configured to design a plurality of universal metrology targets, wherein an arrangement of plurality of universal targets and active circuit layout of one or more devices of the wafer are at or above a selected device pattern density.

6. The system of claim 3, wherein the wherein the lithography tool is configured to design a plurality of universal metrology targets configured to generate inspection detection during run-time alignment at or above a selected threshold level.

7. The system of claim 3, wherein the lithography tool is configured to design a plurality of universal metrology targets configured for imaging by a scanning electron microscope.

8. The system of claim 3, wherein the wherein the lithography tool is configured to identify a plurality of inspectable features within at least one die of a wafer with a design search of one or more sets of design data associated with the one or more devices of the wafer.

9. The system of claim 3, wherein the lithography tool is configured to lithographically print the plurality of universal metrology targets within the at least one die of the wafer with a lithography tool.

10. The system of claim 3, wherein the lithography tool is configured to dispose the plurality of universal metrology targets and one or more active circuit elements within the at least one die of the wafer such that a pattern density associated with the active circuit layout of the one or more devices of the wafer is above a selected device pattern density.

11. The system of claim 3, wherein the lithography tool is configured to dispose a plurality of universal metrology targets within the die of a wafer at a plurality of positions in compliance with one or more design of manufacturability requirements associated with one or more devices of the wafer.

12. The system of claim 3, wherein at least one of the plurality of universal targets comprises:

a first metrology target structure disposed on a first process layer; and

at least a second metrology target disposed on a second process layer, wherein a shift along at least one direction between the first metrology target structure and the at least a second metrology target structure is measurable by the metrology tool.

13. The system of claim 12, wherein at least one of the plurality of universal targets comprises:

a first metrology target structure including a set of diagonal target structure elements; and

at least a second metrology target structure including a set of diagonal target structure elements, wherein a shift along at least one direction between the first metrology target structure and the at least a second metrology target structure is measurable by the metrology tool.

14. The system of claim 12, wherein at least one of the plurality of universal targets comprises:

a first metrology target structure disposed on a first process layer having a first size; and

at least a second metrology target disposed on a second process layer having a second size different than the first size, wherein a shift along at least one direction between the first metrology target structure and the at least a second metrology target structure is measurable by the metrology tool.

15. The system of claim 12, wherein at least one of the plurality of universal targets comprises:

a first metrology target structure disposed on a first process layer having a first shape; and

at least a second metrology target disposed on a second process layer having a second shape different than the first size, wherein a shift along at least one direction between the first metrology target structure and the at least a second metrology target structure is measurable by the metrology tool.

16. The system of claim 3, wherein at least one of the plurality of universal targets comprises:

a first metrology target structure disposed on a process layer; and

at least a second metrology target disposed on the process layer, wherein a size difference between the first metrology target structure and the at least a second metrology target structure is measurable by the metrology tool.

17. The system of claim 3, wherein at least one of the plurality of universal targets comprises:

a first metrology target structure disposed on a process layer; and

at least a second metrology target disposed on the process layer, wherein a position difference between the first metrology target structure and the at least a second metrology target structure is measurable by the metrology tool.

18. The system of claim 3, wherein at least one of the size and shape of the region is selected for the inspection tool to achieve inspection sensitivity at or above a selected level.

19. The system of claim 3, wherein the inspection tool comprises:

an optical inspection tool.

20. The system of claim 3, wherein the inspection tool comprises:

an electron beam inspection tool.

21. The system of claim 3, wherein the inspection tool comprises:

a scanning electron microscope (SEM).

23. The system of claim 3, wherein the metrology tool comprises:

an overlay metrology tool.

24. The system of claim 3, wherein the metrology tool comprises:

a critical dimension metrology tool.

25. The system of claim 3, wherein the wherein the metrology tool comprises:

a scanning electron microscope.