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Isolated through silicon vias in RF technologies

  • US 9,577,035 B2
  • Filed: 07/24/2013
  • Issued: 02/21/2017
  • Est. Priority Date: 08/24/2012
  • Status: Active Grant
First Claim
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1. A method for providing electrical isolation in a semiconductor substrate, said method comprising:

  • etching a deep trench isolation loop and another deep trench isolation loop concurrently to a first depth into said semiconductor substrate, said deep trench isolation loop extending through a shallow trench insulation region and terminating in said semiconductor substrate below a bottom surface of said shallow trench insulation, a width of said deep trench isolation loop being substantially equal to a width of said another deep trench isolation loop;

    forming a semiconductor device within a perimeter of said another deep trench isolation loop;

    depositing a dielectric material into said deep trench isolation loop;

    etching one or more through silicon vias (TSVs) to a second depth into said semiconductor substrate, said one or more TSVs being disposed within a perimeter of said deep trench isolation loop.

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