Semiconductor device and method for manufacturing same

• US 9,577,113 B2
• Filed: 08/05/2016
• Issued: 02/21/2017
• Est. Priority Date: 01/26/2012
• Status: Active Grant

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Saitoh, Yuhichi
• Primary Examiner(s): Toledo, Fernando L
• Assistant Examiner(s): Newton, Valerie N
• Application Number:
  US15/230,300
• Publication Number:
  US 20160343869A1
• Time in Patent Office: 200 Days
• US Class Current: 1/1
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 29/1033 with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with channel and gate aligned in the lengthwise direction H01L29/42376; with buried channel H01L29/7838
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A semiconductor device includes a substrate; a gate electrode provided on the substrate; a first insulating layer formed on the gate electrode; an island-shaped oxide semiconductor layer formed on the first insulating layer; a source electrode electrically connected to the oxide semiconductor layer; and a drain electrode electrically connected to the oxide semiconductor layer, wherein the first insulating layer has a recess in the surface, wherein the oxide semiconductor layer is formed on a bottom surface and side walls of said recess and on an upper face of the first insulating layer, and wherein at least one of the source electrode and the drain electrode is disposed on a portion of the oxide semiconductor layer over the side walls of said recess, and is not formed on a portion of the oxide semiconductor layer over the upper face of the first insulating layer.

Claims

1. A semiconductor device, comprising:

a substrate;

a gate electrode provided on the substrate;

a first insulating layer formed on the gate electrode;

an island-shaped oxide semiconductor layer formed on the first insulating layer;

a source electrode electrically connected to the oxide semiconductor layer; and

a drain electrode electrically connected to the oxide semiconductor layer,

wherein the first insulating layer has a recess in the surface,

wherein the oxide semiconductor layer is formed on a bottom surface and side walls of said recess and on an upper face of the first insulating layer, and

wherein at least one of the source electrode and the drain electrode is disposed on a portion of the oxide semiconductor layer over the side walls of said recess, and is not formed on a portion of the oxide semiconductor layer over the upper face of the first insulating layer.

2. The semiconductor device according to claim 1, further comprising:

a lower wiring layer formed of the same conductive film as the gate electrode;

an upper wiring layer formed of the same conductive film as the source electrode, the upper wiring layer intersecting with the lower wiring layer across the first insulating layer to form a wiring cross portion; and

an island-shaped second insulating layer formed of the same insulating film as the protective layer,

wherein the upper wiring layer includes a first wiring line formed on the upper face of the first insulating layer, and a second wiring line disposed on the wiring cross portion and formed on the side walls of the second insulating layer, and

wherein the upper wiring layer is not formed on the second insulating layer at the wiring cross portion.

3. The semiconductor device according to claim 1, wherein said oxide semiconductor layer includes an In—

Ga—

Zn—

O semiconductor.

4. The semiconductor device according to claim 2, wherein said oxide semiconductor layer includes an In—

Ga—

Zn—

O semiconductor.