Enhanced security for accessing virtual memory
First Claim
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1. A processor comprising:
- a core to execute instructions; and
a memory management unit coupled to the core to cause a handler to control execution of a memory access instruction responsive to determination that a physical address corresponding to a virtual address in the memory access instruction is associated with a memory page having a first indicator to indicate that the memory page includes particular information and a second indicator to indicate that a recency of a most recent access of the memory page exceeds a threshold recency.
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Abstract
A disclosed method includes obtaining a physical address corresponding to a virtual address responsive to detecting a virtual address associated with a memory access instruction and, responsive to identifying a memory page associated with the physical address as a sensitive memory page, evaluating sensitive access information associated with the memory page. If the sensitive access information satisfies a sensitive access criteria, invoking a sensitive access handler to control execution of the memory access instruction.
35 Citations
20 Claims
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1. A processor comprising:
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a core to execute instructions; and a memory management unit coupled to the core to cause a handler to control execution of a memory access instruction responsive to determination that a physical address corresponding to a virtual address in the memory access instruction is associated with a memory page having a first indicator to indicate that the memory page includes particular information and a second indicator to indicate that a recency of a most recent access of the memory page exceeds a threshold recency. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A system comprising:
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a processor including a memory management unit to invoke a handler to control execution of a memory access instruction responsive to determination that a physical address associated with the memory access instruction is associated with a memory page having a first indicator to indicate that the memory page includes particular information and a second indicator to indicate that a recency of a most recent access of the memory page exceeds a threshold recency; a touchscreen controller to communicate with a touchscreen display; and a memory coupled to the processor. - View Dependent Claims (11, 12)
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13. A non-transitory machine-readable medium having stored thereon instructions, which cause at least one machine to perform a method comprising:
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obtaining a physical address corresponding to a virtual address associated with a memory access instruction; determining a state of an enable indicator associated with the memory page; and if the enable indicator is of a first state, determining if a second indicator associated with the memory page is of a second state, and if not, invoking a handler to control execution of the memory access instruction, including evaluating execution environment characteristics to determine whether to allow the memory access instruction to access the memory page. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20)
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Specification