Duty cycle-controlled load switch

• US 9,584,115 B2
• Filed: 06/16/2015
• Issued: 02/28/2017
• Est. Priority Date: 06/17/2014
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Vogt, Justin Patrick, Curtis, Susan Ann, Baldwin, David John
• Primary Examiner(s): DONOVAN, LINCOLN D
• Assistant Examiner(s): Skibinski, Thomas
• Application Number:
  US14/741,208
• Publication Number:
  US 20150365087A1
• Time in Patent Office: 623 Days
• Field of Search: 327108-112, 327/427, 327/434, 327/437, 327170-175, 327156-159, 327/536, 326/82, 326/83, 326/87
• US Class Current: 1/1
• CPC Class Codes: H02M 1/0048 Circuits or arrangements for reducing losses using snubbers H02M1/34
• CPC Class Codes: H02M 1/08 Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
• CPC Class Codes: H02M 3/07 using capacitors charged and discharged alternately by semiconductor devices with control electrode , e.g. charge pumps
• CPC Class Codes: H03K 17/687 the devices being field-effect transistors
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A switch includes a power transistor configured to switch an input voltage to a load. The switch further includes a charge pump and a duty cycle controller. The charge pump is coupled to the power transistor and includes an enable input to cause the charge pump to be turned on and off. The duty cycle controller is coupled to the charge pump and is configured to duty cycle the charge pump based on a comparison of a signal of a gate of the power transistor to a reference signal.

Claims

1. A switch, comprising:

a power transistor configured to switch an input voltage to a load;

a charge pump coupled to the power transistor, the charge pump including an enable input to cause the charge pump to be turned on and off; and

a duty cycle controller coupled to the charge pump and configured to duty cycle the charge pump based on a comparison of a signal of a gate of the power transistor to a reference signal, the duty cycle controller including;

a comparator configured to compare the signal of the gate of the power transistor to the reference signal;

a resistor coupled to the gate of the power transistor; and

a field effect transistor (FET) including a gate, a source and a drain, in which the source is coupled to the resistor, the gate of the FET is coupled to the load, and the drain of the FET is coupled to an input of the comparator.

2. The switch of claim 1, wherein the power transistor is an re-channel metal oxide semiconductor (nMOS) transistor.

3. The switch of claim 1, wherein the duty cycle controller includes a current comparator.

4. The switch of claim 3, wherein the current comparator is configured to compare a current generated from a voltage of the gate of the power transistor to a reference current.

5. The switch of claim 3, further comprising a current mirror configured to generate, as the reference signal, the lower of:

a current derived from a reference voltage; and

a current that is a sum of an offset current and a current derived from the input voltage.

6. The switch of claim 1, wherein the duty cycle controller is configured to disable the charge pump upon a determination that the signal of the gate of the power transistor is above the reference signal and to enable the charge pump upon a determination that the signal of the gate of the power transistor is below the reference signal.

7. The switch of claim 1, further comprising an oscillator and a driver, wherein the driver is coupled to the gate of the power transistor and wherein the duty cycle controller is coupled to the oscillator and the driver and configured to duty cycle the oscillator, charge pump, and driver based on the comparison of the signal of the gate of the power transistor to the reference signal.

8. An apparatus, comprising:

a load;

a power transistor coupled to the load and configured to switch an input voltage to the load to power the load;

a charge pump coupled to the power transistor, the charge pump including an enable input to cause the charge pump to be turned on and off;

a comparator coupled to the charge pump and configured to generate an enable signal to the charge pump to turn the charge pump on and off based on a comparison of a signal of a gate of the power transistor to a reference signal to duty cycle the charge pump; and

a resistor coupled to the gate of the power transistor and to a field effect transistor (FET), the FET including a gate that is coupled to the load and drain that is coupled to an input of the comparator.

9. The apparatus of claim 8 wherein the comparator is a current comparator.

10. The apparatus of claim 8 further including a circuit that generates the reference signal as a minimum of the lower of:

a current derived from a reference voltage; and

a current that is based on a current derived from the input voltage.

11. The apparatus of claim 8 further including a circuit that generates the reference signal as a minimum of the lower of:

a current derived from a reference voltage; and

a current that is a sum of an offset current and a current derived from the input voltage.

12. The apparatus of claim 8 including an oscillator and a driver, the driver is coupled to the gate of the power transistor and the comparator is coupled to the oscillator and the driver and configured to provide the enable signal to the oscillator, charge pump, and driver to synchronously turn on and off the oscillator, charge pump, and driver.

13. The apparatus of claim 8 wherein the power transistor is an re-channel metal oxide semiconductor (nMOS) transistor.

14. A method, comprising:

receiving a signal indicative of a voltage of a gate of a power transistor configured to switch an input voltage to a load;

comparing the signal indicative of the gate voltage to a reference signal, including comparing a current derived from the gate voltage to a current reference signal;

duty cycling a charge pump configured to turn on the power transistor based on the comparison of the signal indicative of the gate voltage to the reference signal; and

generating the current reference signal as the lower of;

a current derived from a reference voltage; and

a current that is a sum of an offset current and a current derived from the input voltage.