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Radio frequency transceiver loopback testing

  • US 9,584,175 B2
  • Filed: 12/16/2014
  • Issued: 02/28/2017
  • Est. Priority Date: 12/16/2014
  • Status: Active Grant
First Claim
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1. An integrated circuit comprising:

  • a receiver portion comprising;

    a first receiver input to receive a radio frequency (RF) signal;

    a second receiver input to receive an output signal from a phase locked loop; and

    a mixer coupled to the first receiver input and to the second receiver input;

    a transmitter portion to transmit an RF signal at a transmitter output of the transmitter portion and to receive a modulated PLL signal at a transmitter input of the transmitter portion;

    the phase locked loop (PLL) shared between the receiver portion and the transmitter portion, the PLL during normal operation being used by the transmitter portion during a transmit mode and being used by the receiver portion during a receive mode, and the PLL providing at an output the modulated PLL signal based on a transmitter modulation signal; and

    wherein, during a test mode, the transmitter output and the first receiver input are coupled together in a loopback configuration, and the modulated PLL signal is provided to both the first receiver input and to the second receiver input.

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