Solid-state imaging apparatus and imaging device

• US 9,584,748 B2
• Filed: 05/20/2015
• Issued: 02/28/2017
• Est. Priority Date: 05/22/2014
• Status: Active Grant

• Current Assignee: Olympus Corporation
• Original Assignee: Olympus Corporation
• Inventors: Saito, Masashi
• Primary Examiner(s): Ko, Tony
• Application Number:
  US14/717,710
• Publication Number:
  US 20150341581A1
• Time in Patent Office: 650 Days
• US Class Current: 1/1
• CPC Class Codes: H03M 1/0624 by synchronisation
• CPC Class Codes: H03M 1/0845 of power supply variations, e.g. ripple
• CPC Class Codes: H03M 1/123 Simultaneous, i.e. using one converter per channel but with common control or reference circuits for multiple converters
• CPC Class Codes: H03M 1/56 Input signal compared with linear ramp
• CPC Class Codes: H04N 25/745 Circuitry for generating timing or clock signals
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 25/778 comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself

Abstract

A solid-state imaging apparatus includes an imaging section in which a plurality of pixels, each of which has a photoelectric conversion element, are disposed in a matrix; a clock generation section; a reference signal generation section configured to generate a reference signal whose amplitude increases or decreases with the passage of time; a comparison section disposed corresponding to a column in an array of the plurality of pixels; a latch section disposed corresponding to the comparison section and configured to latch logic states of the plurality of phase signals; and a latch control section disposed corresponding to the comparison section, wherein the comparison section includes a differential amplifier, a current output element, and a third transistor, and wherein the comparison section outputs a second comparison signal based on the current output from the current output element after the second timing.

Claims

1. A solid-state imaging apparatus comprising:

an imaging section in which a plurality of pixels, each of which has a photoelectric conversion element, are disposed in a matrix;

a clock generation section configured to generate a plurality of phase signals including different phases from each other;

a reference signal generation section configured to generate a reference signal whose amplitude increases or decreases with the passage of time;

a comparison section disposed corresponding to a column in an array of the plurality of pixels and configured to start a comparison process on a pixel signal output from the pixel and the reference signal at a first timing and end the comparison process at a second timing at which the reference signal has satisfied a predetermined condition with respect to the pixel signal;

a latch section disposed corresponding to the comparison section and configured to latch logic states of the plurality of phase signals; and

a latch control section disposed corresponding to the comparison section and configured to enable the latch section at the second timing and cause the latch section to execute a latch operation at a third timing at which a time based on a current output from the comparison section has elapsed from the second timing,

wherein the comparison section includes

a differential amplifier including a first transistor with a gate to which the reference signal is input and a second transistor with a gate to which the pixel signal is input and configured to output a first comparison signal determined according to a result of comparing the reference signal to the pixel signal when the comparison process is executed,

a current output element configured to output substantially a constant current when the comparison process is executed, and

a third transistor,

wherein the third transistor includes a gate to which the first comparison signal is input,

before the second timing at which a state of the first comparison signal changes, a current output from the current output element flows between a drain and a source, and

after the second timing, the third transistor becomes an OFF state, and

wherein the comparison section outputs a second comparison signal based on the current output from the current output element after the second timing.

2. The solid-state imaging apparatus according to claim 1, wherein the current output element is a fourth transistor including a gate to which a reference voltage is input.

3. The solid-state imaging apparatus according to claim 1, wherein the current output element outputs a current less than or equal to a sum of a current flowing between the drain and the source of the first transistor and a current flowing between the drain and the source of the second transistor.

4. The solid-state imaging apparatus according to claim 1,

wherein a column in the array of the plurality of pixels is classified as one of a plurality of first columns or one of a plurality of second columns,

wherein the current output element of the comparison section to which the pixel signal output from the pixel in the first column is input outputs a first current, and

wherein the current output element of the comparison section to which the pixel signal output from the pixel in the second column is input outputs a second current having a different current value than the first current.

5. The solid-state imaging apparatus according to claim 4, wherein one of the plurality of first columns is disposed for every predetermined number of columns in the array of the plurality of pixels and the one of the plurality of second columns is disposed for every predetermined number of columns in the array of the plurality of pixels.

6. The solid-state imaging apparatus according to claim 5, wherein each of the plurality of first columns and the plurality of second columns is configured of a plurality of columns continuous in the array of the plurality of pixels.

7. The solid-state imaging apparatus according to claim 6, wherein the array of the plurality of pixels is an array including a plurality of unit arrays, each of which is configured of a plurality of continuous columns.

8. The solid-state imaging apparatus according to claim 5,

wherein two columns of the plurality of first columns are not adjacent to each other,

wherein two columns of the plurality of second columns are not adjacent to each other, and

wherein one column of the plurality of first columns is adjacent to one column of the plurality of second columns.

9. The solid-state imaging apparatus according to claim 5, wherein the first and second columns are disposed in a region corresponding to one half or less of a cycle of a change in the pixel signal of the row direction in the array of the plurality of pixels.

10. The solid-state imaging apparatus according to claim 1,

wherein a column in the array of the plurality of pixels is classified as one of a plurality of first columns or one of a plurality of second columns,

wherein a first load capacitor is connected to a contact point between the current output element of the comparison section to which the pixel signal output from the pixel in the first column is input and the third transistor, and

wherein a second load capacitor having a different capacitance value than the first load capacitor is connected to a contact point between the current output element of the comparison section to which the pixel signal output from the pixel in the second column is input and the third transistor.

11. The solid-state imaging apparatus according to claim 10, wherein one of the plurality of first columns is disposed for every predetermined number of columns in the array of the plurality of pixels and the one of the plurality of second columns is disposed for every predetermined number of columns in the array of the plurality of pixels.

12. The solid-state imaging apparatus according to claim 11, wherein each of the plurality of first columns and the plurality of second columns is configured of a plurality of columns continuous in the array of the plurality of pixels.

13. The solid-state imaging apparatus according to claim 12, wherein the array of the plurality of pixels is an array including a plurality of unit arrays, each of which is configured of a plurality of continuous columns.

14. The solid-state imaging apparatus according to claim 11,

wherein two columns of the plurality of first columns are not adjacent to each other,

wherein two columns of the plurality of second columns are not adjacent to each other, and

wherein one column of the plurality of first columns is adjacent to one column of the plurality of second columns.

15. The solid-state imaging apparatus according to claim 11, wherein the first and second columns are disposed in a region corresponding to one half or less of a cycle of a change in the pixel signal of the row direction in the array of the plurality of pixels.

16. An imaging device comprising:

the solid-state imaging apparatus according to claim 1.