System and method for testing an integrated circuit
First Claim
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1. A method of testing an integrated circuit, the method comprising:
- receiving a supply voltage on the integrated circuit via a first input pin;
providing power to circuits disposed on the integrated circuit via the first input pin;
comparing, by a data converter of the integrated circuit, the supply voltage to a voltage internally generated by a first circuit of the integrated circuit;
providing, by the data converter, a first output value in accordance with a voltage difference between the supply voltage and the internally generated voltage;
generating, by a digital interface of the integrated circuit, a digital output value based on the first output value; and
applying the digital output value to a pin of the integrated circuit such that the digital output value is readable in a test mode.
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Abstract
In accordance with an embodiment, a method of testing an integrated circuit, includes receiving a supply voltage on the integrated circuit via a first input pin, providing power to circuits disposed on the integrated circuit via the first input pin, comparing the supply voltage to an internally generated voltage, generating a digital output value based on the comparing, and applying the digital output value to a pin of the integrated circuit.
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Citations
36 Claims
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1. A method of testing an integrated circuit, the method comprising:
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receiving a supply voltage on the integrated circuit via a first input pin; providing power to circuits disposed on the integrated circuit via the first input pin; comparing, by a data converter of the integrated circuit, the supply voltage to a voltage internally generated by a first circuit of the integrated circuit; providing, by the data converter, a first output value in accordance with a voltage difference between the supply voltage and the internally generated voltage; generating, by a digital interface of the integrated circuit, a digital output value based on the first output value; and applying the digital output value to a pin of the integrated circuit such that the digital output value is readable in a test mode. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. An integrated circuit comprising:
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a first circuit; a digital interface; and a data converter having a first input coupled to a supply voltage, a second input coupled to the first circuit, and a first output coupled to the digital interface, wherein the digital interface is readable in a test mode, and the data converter is configured to provide a value at the first output based on a voltage difference between the first input and the second input. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21, 22)
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23. An integrated circuit comprising:
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a semiconductor switch; a digital interface; and a comparator having a first input coupled to a reference voltage, a second input coupled to a substrate connection of the semiconductor switch, and an output coupled to the digital interface, wherein the comparator is configured to provide a value at its output based on a voltage difference between the first input and the second input. - View Dependent Claims (24, 25, 26)
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27. A method of testing an integrated circuit, the method comprising:
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receiving a first supply voltage on the integrated circuit via a first input pin; providing power to circuits disposed on the integrated circuit via the first input pin; providing, by an internal voltage generation circuit of the integrated circuit, an internal supply voltage at an internal supply voltage terminal; comparing the first supply voltage to the internal supply voltage using a first analog comparator configured to compare two analog voltages with each other; generating, by a digital interface, a first digital output value based on the comparing; and applying the first digital output value to a pin of the integrated circuit such that the first digital output value is readable in a test mode. - View Dependent Claims (28, 29, 30, 31)
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32. An integrated circuit comprising:
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a first internal voltage generation circuit configured to produce an internal supply voltage at a first internal supply voltage terminal; a digital interface; and a first analog comparator having a first input coupled to a first power supply pin, a second input coupled to the first internal supply voltage terminal, and an output coupled to the digital interface, wherein the digital interface is readable in a test mode. - View Dependent Claims (33, 34, 35, 36)
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Specification