Computer having self-monitoring function and monitoring program

• US 9,588,878 B2
• Filed: 08/22/2013
• Issued: 03/07/2017
• Est. Priority Date: 08/23/2012
• Status: Active Grant

• Current Assignee: BTC JAPAN CO.,LTD., Toyota Jidosha Kabushiki Kaisha (Toyota Motor Corporation)
• Original Assignee: BTC JAPAN CO.,LTD., Toyota Jidosha Kabushiki Kaisha (Toyota Motor Corporation)
• Inventors: Shiraishi, Shinichi, Akei, Masaharu, Ando, Taichi
• Primary Examiner(s): Lottich, Joshua P
• Application Number:
  US14/423,309
• Publication Number:
  US 20150261660A1
• Time in Patent Office: 1,293 Days
• US Class Current: 1/1
• CPC Class Codes: G06F 11/3672 Test management
• CPC Class Codes: G06F 11/3688 for test execution, e.g. scheduling of test suites
• CPC Class Codes: G06F 11/3692 for test results analysis

Abstract

A computer comprises an input unit configured to acquire an input operation; a first program execution unit configured to execute a computing program performing a computation based on the input operation acquired by the input unit; a test scenario storage unit configured to store a plurality of test scenarios for the computing program; and a second program execution unit configured to execute a monitoring program determining whether or not the input operation acquired by the input unit corresponds to any of the plurality of the stored test scenarios.

Claims

1. A computer comprising:

an input unit configured to acquire an input operation;

a first program execution unit configured to execute a computing program performing a computation based on the input operation acquired by the input unit;

a test scenario storage unit configured to store a plurality of test scenarios for the computing program; and

a second program execution unit configured to execute a monitoring program determining whether or not the input operation acquired by the input unit corresponds to any of the plurality of the stored test scenarios.

2. The computer according to claim 1, wherein

each of the test scenarios includes details and an order of a plurality of the input operations.

3. The computer according to claim 2, wherein

the monitoring program acquires a plurality of the input operations from the input unit and, in a case where the plurality of the acquired input operations match the details and the order of the input operations included in any of the test scenarios, the monitoring program determines that the acquired input operation corresponds to the test scenario.

4. The computer according to claim 1, wherein

the monitoring program notifies the computing program or an external program that a system is in an unchecked state in a case where the acquired input operation does not correspond to any of the plurality of the stored test scenarios.

5. A non-transitory computer readable medium containing a monitoring program executed simultaneously with a computing program performing a computation and monitoring an input operation to the computing program,

the program comprising:

an input acquisition step of acquiring the input operation to the computing program; and

an input determination step of determining whether or not the acquired input operation corresponds to any of a plurality of pre-stored test scenarios for the computing program.

6. The non-transitory computer readable medium according to claim 5, wherein

each of the stored test scenarios includes details and an order of a plurality of the input operations.

7. The non-transitory computer readable medium according to claim 6, wherein

the input acquisition step includes acquiring a plurality of the input operations, and

in a case where the plurality of the acquired input operations match the details and the order of the input operations included in any of the test scenarios, the input determination step includes determining that the acquired input operation corresponds to the test scenario.

8. The non-transitory computer readable medium according to claim 5, wherein

in a case where the acquired input operation does not correspond to any of the plurality of the stored test scenarios in the input determination step, a step of notifying the computing program or an external program that a system is in an unchecked state is executed.

9. A hardware processor generating a computing program performing a computation and a monitoring program monitoring an input operation to the computing program, the hardware processor comprising:

a computing program input unit configured to receive an input of a code of the computing program;

a test scenario input unit configured to receive an input of a plurality of test scenarios for the computing program that are described in a modeling language;

a computing program generation unit configured to generate the computing program;

a monitoring program generation unit configured to generate the monitoring program including the plurality of the test scenarios and determining whether or not the input operation to the computing program corresponds to any of the plurality of the test scenarios; and

a program writing unit configured to record the computing program and the monitoring program in an object computer, wherein

the computing program generation unit adds processing for notifying the monitoring program of the input operation performed to the computing program, with predetermined processing being performed by the computing program used as a trigger on the computing program.

10. The hardware processor according to claim 9, wherein

each of the test scenarios includes details and an order of a plurality of the input operations.

11. The hardware processor according to claim 10, wherein

the monitoring program acquires a plurality of the input operations and, in a case where the plurality of the acquired input operations match the details and the order of the input operations included in any of the test scenarios, the monitoring program determines that the acquired input operation corresponds to the test scenario.

12. The hardware processor according to claim 9, wherein

the monitoring program is capable of notifying the computing program or an external program that a system is in an unchecked state in a case where the acquired input operation does not correspond to any of the plurality of the test scenarios.