Methods and apparatus for one-dimensional signal extraction

• US 9,589,199 B2
• Filed: 08/27/2015
• Issued: 03/07/2017
• Est. Priority Date: 12/23/2011
• Status: Active Grant

• Current Assignee: Cognex Corporation
• Original Assignee: Cognex Corporation
• Inventors: Silver, William M., Bachelder, Ivan
• Primary Examiner(s): Dunphy, David F
• Application Number:
  US14/837,115
• Publication Number:
  US 20150363661A1
• Time in Patent Office: 558 Days
• US Class Current: 1/1
• CPC Class Codes: G06F 18/00 Pattern recognition
• CPC Class Codes: G06F 2218/02 Preprocessing
• CPC Class Codes: G06K 7/00 Methods or arrangements for sensing record carriers, e.g. for reading patterns methods or arrangements for marking the record carrier in digital fashion G06K1/00; pattern recognition G06F18/00; arrangements for image or video recognition or understanding G06V10/00; character recognition, recognising digital ink or document-oriented image-based pattern recognition G06V30/00
• CPC Class Codes: G06K 7/10 by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation
• CPC Class Codes: G06K 7/10722 Photodetector array or CCD scanning
• CPC Class Codes: G06K 7/1413 1D bar codes
• CPC Class Codes: G06K 7/1456 determining the orientation of the optical code with respect to the reader and correcting therefore
• CPC Class Codes: G06K 7/146 the method including quality enhancement steps
• CPC Class Codes: G06K 7/1478 adapting the threshold for pixels in a CMOS or CCD pixel sensor for black and white recognition
• CPC Class Codes: G06V 10/242 by image rotation, e.g. by 90 degrees
• CPC Class Codes: G06V 10/44 Local feature extraction by analysis of parts of the pattern, e.g. by detecting edges, contours, loops, corners, strokes or intersections; Connectivity analysis, e.g. of connected components
• CPC Class Codes: G06V 10/94 Hardware or software architectures specially adapted for image or video understanding
• CPC Class Codes: G06V 30/224 of printed characters having additional code marks or containing code marks

Abstract

Methods and apparatus are disclosed for extracting a one-dimensional digital signal from a two-dimensional digital image along a projection line. In some embodiments a repeating sequence of pixel weight templates, and a sequence of relative positions, are selected in response to the orientation of a projection line and used to compute a sequence of weighted sums. The sequence can be selected to achieve desirable properties, for example photometric accuracy, geometric accuracy, resolution, and/or noise reduction. In some embodiments registers and multiply-accumulators are arranged and controlled so as to compute the 1D signal.

Claims

1. A digital electronic apparatus for extracting from a two-dimensional digital image a one-dimensional digital signal along a projection line, comprising:

an image memory in which is stored at least a portion of the digital image, the image memory comprising a plurality of pixels;

a set of K registers, wherein K is a predetermined integer greater than 1, and wherein the set of registers is capable of being linearly shifted, where a zero value is shifted in and where values shifted out comprise the one-dimensional signal;

a table memory that holds data comprised of a plurality of modules, each module corresponding to an orientation relative to the two-dimensional digital image and comprising a data from which can be obtained a sequence of relative pixel addresses and a sequence of pixel weights;

at least one multiply-accumulator for multiplying pixels by pixel weights from the sequence of pixel weights, and adding the products to registers of the set of registers;

and a control unit that operates so as to select a module from the table memory in response to an orientation of the projection line relative to the two-dimensional digital image and repeat, for a plurality of locations in the image memory, actions comprising

fetching pixels from the image memory as directed by the sequence of relative pixel addresses of the selected module;

directing the at least one multiply-accumulator to update the set of registers using fetched pixels and pixel weights from the sequence of pixel weights of the selected module; and

directing the set of registers to shift and thereby produce the one-dimensional signal.

2. The apparatus of claim 1, wherein K is 2.

3. The apparatus of claim 1, wherein the control unit is a microprocessor.

4. The apparatus of claim 3, wherein the image memory is a static random access memory of the microprocessor.

5. The apparatus of claim 3, wherein the microprocessor has general-purpose registers that hold the set of K registers.

6. The apparatus of claim 3, wherein the control unit directs the at least one multiply-accumulator using a dot product instruction.