Fin cut enabling single diffusion breaks
First Claim
1. A method for forming a diffusion break in a finned semiconductor structure, comprising:
- obtaining a finned semiconductor structure including a bulk semiconductor substrate including a substrate portion, a plurality of parallel fins extending from the substrate portion, a shallow trench isolation region, each of the fins including a top region extending above the shallow trench isolation region and a bottom region within the shallow trench isolation region, a plurality of parallel dummy gates extending over the fins and perpendicularly with respect to the fins, and spacers lining the dummy gates;
removing at least one of the dummy gates to form a space between a pair of the spacers and above at least a first of the parallel fins;
ion implanting the top region of the first fin to cause the formation of a top amorphous alloy fin region;
removing the top amorphous alloy fin region of the first fin using a chemical etch selective to the spacers, the shallow trench isolation region, and the substrate;
ion implanting a portion of the bottom region of the first fin following removing the top amorphous alloy fin region to cause the formation of a bottom amorphous alloy fin region, andremoving the bottom amorphous alloy fin region of the first fin using a chemical etch selective to the spacers, the shallow trench isolation region, and the substrate to form a recess within the shallow trench isolation region, the space and the recess forming a diffusion break cut region.
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Abstract
A method is provided for forming a fin cut that enables a single diffusion break in very dense CMOS structures formed using bulk semiconductor substrates. A dummy gate is removed from a finned structure to expose the top regions of the fins, the bottom fin regions being within a shallow trench isolation region. Selective vapor phase etching follows sequential ion implantation of the top and bottom fin regions to form a diffusion break cut region. The non-implanted regions of the substrate and the shallow trench isolation region remain substantially intact during each etching procedure. Double diffusion break cut regions are also enabled by the method.
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Citations
20 Claims
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1. A method for forming a diffusion break in a finned semiconductor structure, comprising:
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obtaining a finned semiconductor structure including a bulk semiconductor substrate including a substrate portion, a plurality of parallel fins extending from the substrate portion, a shallow trench isolation region, each of the fins including a top region extending above the shallow trench isolation region and a bottom region within the shallow trench isolation region, a plurality of parallel dummy gates extending over the fins and perpendicularly with respect to the fins, and spacers lining the dummy gates; removing at least one of the dummy gates to form a space between a pair of the spacers and above at least a first of the parallel fins; ion implanting the top region of the first fin to cause the formation of a top amorphous alloy fin region; removing the top amorphous alloy fin region of the first fin using a chemical etch selective to the spacers, the shallow trench isolation region, and the substrate; ion implanting a portion of the bottom region of the first fin following removing the top amorphous alloy fin region to cause the formation of a bottom amorphous alloy fin region, and removing the bottom amorphous alloy fin region of the first fin using a chemical etch selective to the spacers, the shallow trench isolation region, and the substrate to form a recess within the shallow trench isolation region, the space and the recess forming a diffusion break cut region. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification