Self-driven AC-DC synchronous rectifier for power applications

• US 9,590,523 B2
• Filed: 10/17/2014
• Issued: 03/07/2017
• Est. Priority Date: 02/12/2010
• Status: Active Grant

• Current Assignee: City University of Hong Kong
• Original Assignee: City University of Hong Kong
• Inventors: Hui, Shu Yuen Ron, Zhong, Wenxing, Choi, Ho Wing
• Primary Examiner(s): Finch, III, Fred E
• Application Number:
  US14/517,704
• Publication Number:
  US 20150085547A1
• Time in Patent Office: 872 Days
• US Class Current: 1/1
• CPC Class Codes: H02M 7/06 using discharge tubes without control electrode or semiconductor devices without control electrode
• CPC Class Codes: H02M 7/217 using semiconductor devices only
• CPC Class Codes: H02M 7/2173 in a biphase or polyphase circuit arrangement H02M7/2176 takes precedence; voltage multipliers H02M7/25
• CPC Class Codes: H02M 7/219 in a bridge configuration
• CPC Class Codes: H02M 7/2195 the switches being synchronously commutated at the same frequency of the AC input voltage
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

Systems, methods, and devices that employ self-driven gate-drive circuitry to facilitate controlling power switches to emulate a diode bridge to synchronously rectify a power signal are presented. A single-phase or multi-phase synchronous rectifier can comprise at least a first pair of switches of a first conducting path and a second pair of switches of a second conducting path that can form or emulate a diode bridge. To facilitate emulating turn-on and turn-off conditions of a diode, a switch can be turned on when voltage across the switch is forward-biased and turned off when switch current is reversed; also, there can be at least one current-controlled switch in each conducting path. Self-driven gate-drive circuitry employs low power components that can facilitate controlling respective switching of the at least first pair and second pair of switches, wherein switching of the switches is also controlled at start-up to emulate a diode bridge.

Claims

1. A system, comprising:

a set of power switches that receive an input power signal and rectify the input power signal to generate a rectified power signal as an output to facilitate synchronous rectification of the input power signal; and

a self-driven gate-drive (SDGD) subsystem that facilitates control of respective switching of respective power switches of the set of power switches, wherein the SDGD subsystem is powered by the rectified power signal or the input power signal, wherein the SDGD subsystem comprises a set of capacitors comprising a first capacitor, a second capacitor, and a third capacitor, and wherein the SDGD subsystem controls respective charging of the first capacitor, the second capacitor, and the third capacitor to facilitate maintaining a first power switch of the set of power switches in a first switch state during a start-up phase of operation of the system until the SDGD subsystem is determined to be operating in steady state.

2. The system of claim 1, wherein the set of power switches comprises a first high-side power switch, at least one other high-side power switch, a first low-side power switch, and at least one other low-side power switch that are arranged and associated with each other to form and function as a diode bridge to facilitate the rectification of the input power signal to generate the rectified power signal, and wherein the first power switch is the first high-side power switch and a second power switch of the set of power switches is the first low-side power switch.

3. The system of claim 2, wherein the input power signal is a multi-phase power signal that has at least three phases, and wherein the set of power switches comprises the first high-side power switch, a second high-side power switch, a third high-side power switch, the first low-side power switch, a second low-side power switch, and a third low-side power switch that are arranged and associated with each other to form and function as the diode bridge to facilitate the rectification of the multi-phase power signal to generate the rectified power signal.

4. The system of claim 2, wherein the first high-side power switch and the at least one other high-side power switch are voltage-controlled self-driven switches, and the first low-side power switch and the at least one other low-side power switch are current-controlled self-driven switches.

5. The system of claim 4, wherein the SDGD subsystem further comprises:

a first high-side SDGD component, at least one other high-side SDGD component, a first low-side SDGD component, and at least one other low-side SDGD component, wherein the first high-side SDGD component comprises voltage-controlled gate-drive circuitry and is associated with the first high-side power switch, the at least one other high-side SDGD component comprises voltage-controlled gate-drive circuitry and is associated with the at least one other high-side power switch, the first low-side SDGD component comprises current-controlled gate-drive circuitry and is associated with the first low-side power switch, and wherein the at least one other SDGD component comprises current-controlled gate-drive circuitry and is associated with the at least one other low-side power switch.

6. The system of claim 5, wherein at least one of the first high-side SDGD component, the at least one other high-side SDGD component, the first low-side SDGD component, or the at least one other low-side SDGD component receives at least a portion of the rectified power signal to facilitate operation of the at least one of the first high-side SDGD component, the at least one other high-side SDGD component, the first low-side SDGD component, or the at least one other low-side SDGD component.

7. The system of claim 4, wherein at least one of the first high-side power switch or the at least one other high-side power switch is respectively configured to be switched from an off state to an on state in response to receipt of a forward-biased voltage that satisfies an applicable defined gate threshold switching voltage level, wherein, with respect to the first high-side power switch, the first switch state is the off state and the second switch state is the on state, and wherein at least one of the first low-side power switch or the at least one other low-side power switch is further configured to be switched from a respective on state to a respective off state in response to current in the at least one of the first low-side power switch or the at least one other low-side power switch being reversed.

8. The system of claim 4, wherein the first high-side power switch, the at least one other high-side power switch, the first low-side power switch, and the at least one other low-side power switch are arranged in a circuit with respect to each other to facilitate function of the set of power switches as the diode bridge in order to facilitate the rectification of the input power signal to generate the rectified power signal, during the start-up phase of operation prior to steady-state operation of the SDGD subsystem.

9. The system of claim 4, wherein the first high-side power switch, the at least one other high-side power switch, the first low-side power switch, and the at least one other low-side power switch comprise respective body diodes to facilitate function of the set of power switches as the diode bridge in order to facilitate the rectification of the input power signal to generate the rectified power signal, during the start-up phase of operation prior to steady-state operation of the SDGD subsystem.

10. The system of claim 1, wherein the SDGD subsystem further comprises a high-side SDGD portion and a low-side SDGD portion that are symmetrical, and wherein the high-side SDGD portion comprises the set of switches and the set of capacitors to facilitate the control of the switching of the first power switch.

11. The system of claim 1, wherein the input power signal has a voltage level that is greater than or equal to 100 volts.

12. The system of claim 1, wherein at least one power switch of the set of power switches is further configured to be a metal-oxide-semiconductor field-effect transistor (MOSFET) switch.

13. A method, comprising:

generating a rectified power signal in response to an input power signal received by a set of power switches, wherein respective power switches of the set of power switches are arranged with respect to each other to emulate functionality of a diode rectifier;

supplying at least a portion of the rectified power signal to a self-driven gate-drive (SDGD) subsystem associated with the set of power switches to facilitate controlling respective switching of the respective power switches of the set of power switches; and

controlling respective charging of a first capacitor, a second capacitor, and a third capacitor of the SDGD subsystem to charge the first capacitor to a first voltage that is higher than a second voltage of the second capacitor before the third capacitor is charged to a third voltage that facilitates switching the first power switch from a first switch state to a second switch state, wherein the controlling of the respective charging of the first capacitor, the second capacitor, and the third capacitor facilitates maintaining the first power switch in the first switch state during initiation of the SDGD subsystem until the SDGD subsystem is operating in steady state.

14. The method of claim 13, further comprising:

controlling at least one of a first high-side power switch or at least one other high-side power switch to switch from an off state to an on state in response to receiving a forward-biased voltage that satisfies an applicable defined gate threshold switching voltage level; and

controlling at least one of a first low-side power switch or at least one other low-side power switch to switch from an on state to an off state in response to sensing a reversing of current in at least one of the first low-side power switch or the at least one other low-side power switch, wherein the set of power switches comprises the first high-side power switch, the at least one other high-side power switch, the first low-side power switch, and the at least one other low-side power switch, and wherein the first power switch is the first high-side power switch and a second power switch of the set of power switches is the first low-side power switch.

15. The method of claim 13, further comprising:

controlling switching of at least one of a first high-side power switch or at least one other high-side power switch to switch at least one of the first high-side power switch or the at least one other high-side power switch to an off state, during a period of time that the SDGD subsystem is not operating in the steady state, wherein the set of power switches comprises the first high-side power switch and the at least one other high-side power switch, and wherein the first power switch is the first high-side power switch, and, with respect to the first power switch, the first switch state is the off state.

16. The method of claim 13, further comprising:

controlling switching of at least one of a first low-side power switch or at least one other low-side power switch to switch at least one of the first low-side power switch or the at least one other low-side power switch to an off state, during a period of time that the SDGD subsystem is not operating in the steady state, wherein the set of power switches comprises the first low-side power switch and the at least one other low-side power switch, and wherein a second power switch of the set of power switches is the first low-side power switch.

17. The method of claim 13, further comprising:

supplying a defined positive voltage signal to a comparator of the SDGD subsystem to facilitate controlling switching of a second power switch of the set of power switches that is associated with the comparator to switch the second power switch from an on state to an off state at or substantially close to a zero-voltage-crossing point at a half-cycle associated with the input power signal, wherein the input power signal has a voltage level that is at least 100 volts.

18. A self-driven synchronous rectifier device, comprising:

a set of power switches that is configured to receive an input voltage signal and rectify the input voltage signal to generate a rectified voltage signal as an output; and

a self-driven gate-drive (SDGD) subsystem that controls respective switching of respective power switches of the set of power switches, wherein the SDGD subsystem receives at least a portion of the rectified voltage signal, wherein the SDGD subsystem comprises a set of capacitor components comprising a first capacitor component, a second capacitor component, and a third capacitor component, and wherein the SDGD subsystem controls respective charging of the first capacitor component, the second capacitor component, and the third capacitor component to facilitate maintaining a first power switch of the set of power switches in a first switch state during initiation of operation of the SDGD subsystem until the SDGD subsystem is operating in steady state.

19. The self-driven synchronous rectifier device of claim 18, wherein the set of power switches comprises a first high-side power switch, at least one other high-side power switch, a first low-side power switch, and at least one other low-side power switch that are arranged and associated with each other to form and operate as a diode bridge to facilitate the rectification of the input voltage signal to generate the rectified voltage signal, and wherein the first power switch is the first high-side power switch and a second power switch of the set of power switches is the first low-side power switch.

20. The self-driven synchronous rectifier device of claim 18, wherein the set of power switches comprises a first high-side power switch, at least one other high-side power switch, a first low-side power switch, and at least one other low-side power switch that are arranged in a circuit to maintain the first high-side power switch, the at least one other high-side power switch, the first low-side power switch, and the at least one other low-side power switch in an off state, during a period of time that the SDGD subsystem is not operating in the steady state, to facilitate function of the set of power switches as a diode bridge in order to facilitate the rectification of the input power signal to generate the rectified power signal, and wherein the first power switch is the first high-side power switch and a second power switch of the set of power switches is the first low-side power switch, and, with respect to the first power switch, the first switch state is the off state.