Split poly connection via through-poly-contact (TPC) in split-gate based power MOSFETs

• US 9,595,587 B2
• Filed: 04/23/2014
• Issued: 03/14/2017
• Est. Priority Date: 04/23/2014
• Status: Active Grant

• Current Assignee: Alpha & Omega Semiconductor, Ltd.
• Original Assignee: Alpha & Omega Semiconductor, Ltd.
• Inventors: Lee, Yeeheng, Lui, Sik, Kim, Jongoh, Chang, Hong, Bobde, Madhur, Guan, Lingpeng, Yilmaz, Hamza
• Primary Examiner(s): Slutsker, Julia
• Application Number:
  US14/260,215
• Publication Number:
  US 20150311295A1
• Time in Patent Office: 1,056 Days
• Field of Search: 438/270, 438/589, 438/272, 438/259, 257/330, 257/E21.419, 257/E21.284
• US Class Current: 1/1
• CPC Class Codes: H01L 21/28008 Making conductor-insulator-semiconductor electrodes
• CPC Class Codes: H01L 21/28114 characterised by the sectional shape, e.g. T, inverted-T
• CPC Class Codes: H01L 27/0255 using diodes as protective elements
• CPC Class Codes: H01L 27/0266 using field effect transistors as protective elements
• CPC Class Codes: H01L 29/40114 the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/42364 characterised by the insulating layer, e.g. thickness or uniformity H01L29/42324 and H01L29/4234 take precedence
• CPC Class Codes: H01L 29/42376 characterised by the length or the sectional shape
• CPC Class Codes: H01L 29/66666 Vertical transistors H01L29/66712, H01L29/66742 take precedence
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7803 structurally associated with at least one other device assemblies H01L25/00; integrated circuits H01L27/00
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/7827 Vertical transistors H01L29/7802, H01L29/78642 take precedence

Abstract

Embodiments of the present disclosure provide a contact structure in a split-gate trench transistor device for electrically connecting the top electrode to the bottom electrode inside the trench. The transistor device comprises a semiconductor substrate and one or more trenches formed in the semiconductor substrate. The trenches are lined with insulating materials along the sidewalls inside the trenches. Each trench has a bottom electrode in lower portions of the trench and a top electrode in its upper portions. The bottom electrode and the top electrode are separated by an insulating material. A contact structure filled with conductive materials is formed in each trench in an area outside of an active region of the device to connect the top electrode and the bottom electrode. It is emphasized that this abstract is provided to comply with rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Claims

1. A method for fabricating a transistor device, the method comprising:

a) forming a plurality of trenches in a semiconductor substrate, each trench in the plurality being lined with an insulating material along sidewalls inside each trench in the plurality;

b) forming a bottom electrode in lower portions of each trench in the plurality;

c) forming a top electrode in upper portions of each trench in the plurality, wherein the top electrode is separated from the bottom electrode by an inter-electrode insulating layer; and

d) forming a plurality of contact structures, each contact structure in the plurality of contact structures being formed in a corresponding trench in the plurality of trenches in an area outside of an active region of the device, wherein each contact structure in the plurality of contact structures penetrates through an opening in a portion of the top electrode in the corresponding trench of the plurality of trenches and through an opening in a corresponding portion of the inter-electrode insulating layer beneath the top electrode in the corresponding trench of the plurality of trenches to reach the bottom electrode in the corresponding trench of the plurality of trenches, and wherein each contact structure in the plurality of contact structures is filled with a conductive material and provides electrical connection between the bottom electrode formed in the corresponding trench in the plurality of trenches and the top electrode formed in the corresponding trench in the plurality of trenches.

2. The method of claim 1, further comprising forming one or more insulating structures, each of the one or more insulating being configured to electrically isolate a portion of the top electrode formed in an upper portion of a corresponding trench in the plurality of trenches from electrical contact with the bottom electrode formed in a lower portion of the corresponding trench in the plurality of trenches.

3. The method of claim 2, wherein each of the one or more insulating structures is formed near a corresponding contact structure the plurality of contact structures and wherein each of the one or more insulating structures is filled with an insulating material.

4. The method of claim 1, further comprising forming an electrostatic discharge (ESD) protection structure configured to provide electrostatic discharge protection to the device.

5. The method of claim 1, wherein the insulating material lined along sidewalls in upper portions of each trench in the plurality of trenches has a thickness less than that of the insulating material lined along sidewalls in lower portions of each trench in the plurality.

6. The method of claim 1, wherein forming the plurality of contact structures includes etching through the top electrode in the corresponding trench of the plurality of trenches and the inter-electrode insulating layer in the corresponding trench of the plurality of trenches beneath the top electrode to reach the bottom electrode in the corresponding trench of the plurality of trenches.

7. The method of claim 1, wherein the top electrode formed in the upper portions of each trench in the plurality and bottom electrode formed in the lower portions of each trench in the plurality are made of doped polysilicon and the plurality of contact structures are made of a metal.