Semiconductor device and method for manufacturing the same

• US 9,595,600 B2
• Filed: 03/23/2015
• Issued: 03/14/2017
• Est. Priority Date: 09/24/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Tsuji, Takahiro, Suzuki, Kunihiko
• Primary Examiner(s): Slutsker, Julia
• Application Number:
  US14/665,503
• Publication Number:
  US 20150194508A1
• Time in Patent Office: 722 Days
• Field of Search: 438/104, 438/149
• US Class Current: 1/1
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02595 polycrystalline
• CPC Class Codes: H01L 21/02667 Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
• CPC Class Codes: H01L 22/14 for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H01L 29/66742 Thin film unipolar transistors
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

An object is to provide a high reliability thin film transistor using an oxide semiconductor layer which has stable electric characteristics. In the thin film transistor in which an oxide semiconductor layer is used, the amount of change in threshold voltage of the thin film transistor before and after a BT test is made to be 2 V or less, preferably 1.5 V or less, more preferably 1 V or less, whereby the semiconductor device which has high reliability and stable electric characteristics can be manufactured. In particular, in a display device which is one embodiment of the semiconductor device, a malfunction such as display unevenness due to change in threshold voltage can be reduced.

Claims

1. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode layer over a substrate having an insulating surface;

forming a gate insulating layer over the gate electrode layer;

forming an In—

Ga—

Zn—

O-based oxide semiconductor layer over the gate insulating layer;

performing a first heat treatment after the oxide semiconductor layer is formed;

forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer after performing the first heat treatment;

forming an inorganic insulating layer over the gate insulating layer, the oxide semiconductor layer, and the source and the drain electrode layers;

performing a second heat treatment after the inorganic insulating layer is formed; and

forming a planarization layer comprising a resin material over the inorganic insulating layer,

wherein an amount of change in threshold voltage according to a BT test applied to a transistor including the oxide semiconductor layer is less than or equal to 2 V,

wherein the BT test is performed under conditions in which a temperature of the substrate is 150°

C., an electrical field applied to the gate insulating layer is 2 MV/cm, and a time of application of the electrical field is one hour,

wherein the second heat treatment is performed at a temperature higher than or equal to 100°

C. and lower than a maximum temperature in the first heat treatment,

wherein the oxide semiconductor layer is at least partially microcrystalline,

wherein a protective layer is formed on and in contact with the oxide semiconductor layer, in a region comprised between the source electrode layer and the drain electrode layer and in regions overlapping with the source and the drain electrode layers, and

wherein the source and the drain electrode layers are formed over the protective layer.

2. The method for manufacturing a semiconductor device according to claim 1, wherein the amount of change in threshold voltage according to the BT test is less than or equal to 1.5 V.

3. The method for manufacturing a semiconductor device according to claim 1, wherein the amount of change in threshold voltage according to the BT test is less than or equal to 1.0 V.

4. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide semiconductor layer is formed by sputtering method using a target comprising silicon and oxygen.

5. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide semiconductor layer has a degree of crystallization of 80% or more.

6. The method for manufacturing a semiconductor device according to claim 1, wherein the first heat treatment is performed in a nitrogen atmosphere or a rare gas atmosphere.

7. The method for manufacturing a semiconductor device according to claim 1, wherein the second heat treatment is performed in an air atmosphere, an oxygen atmosphere, a nitrogen atmosphere, or a rare gas atmosphere.

8. The method for manufacturing a semiconductor device according to claim 1, wherein the first heat treatment is performed under a condition that the maximum temperature in the first heat treatment is higher than or equal to 350°

C. and lower than or equal to 750°

C.

9. The method for manufacturing a semiconductor device according to claim 1, wherein the first heat treatment is performed under a condition that the maximum temperature in the first heat treatment is higher than 450°

C. and lower than or equal to 750°

C.

10. The method for manufacturing a semiconductor device according to claim 1, further comprising a preliminary heat treatment performed after the step of forming the gate insulating layer and before the step of forming the oxide semiconductor layer, at a temperature higher than or equal to 400°

C. and lower than a strain point of the substrate,

wherein the preliminary heat treatment is performed in an inert atmosphere.

11. The method for manufacturing a semiconductor device according to claim 1, further comprising a preliminary heat treatment performed after the step of forming the gate insulating layer and before the step of forming the oxide semiconductor layer, at a temperature higher than or equal to 400°

C. and lower than a strain point of the substrate.

12. The method for manufacturing a semiconductor device according to claim 1,

wherein the inorganic insulating layer comprises a first sublayer and a second sublayer, the second sublayer being located over the first sublayer;

wherein the first sublayer comprises oxygen and at least one of silicon and nitrogen; and

wherein the second sublayer comprises aluminum.

13. The method for manufacturing a semiconductor device according to claim 1, wherein outer side edges of the gate electrode layer extend beyond outer side edges of the oxide semiconductor layer.

14. The method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is one of a liquid crystal display device and an electrophoretic display device.

15. The method for manufacturing a semiconductor device according to claim 1, wherein the resin material is one of a polyimide, an acrylic resin, a benzocyclobutene-based resin, a polyamide, and an epoxy resin.

16. The method for manufacturing a semiconductor device according to claim 1, wherein a cross-section view showing the oxide semiconductor layer and the source and the drain electrode layers shows that the protective layer does not extend beyond lateral boundaries of the gate electrode layer.

17. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode layer over a substrate having an insulating surface;

forming a gate insulating layer over the gate electrode layer;

forming an In—

Ga—

Zn—

O-based oxide semiconductor layer over the gate insulating layer;

performing a first heat treatment after the oxide semiconductor layer is formed;

forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer after performing the first heat treatment;

forming an inorganic insulating layer over the gate insulating layer, the oxide semiconductor layer, and the source and the drain electrode layers;

performing a second heat treatment after the inorganic insulating layer is formed; and

forming a planarization layer comprising a resin material over the inorganic insulating layer,

wherein the second heat treatment is performed at a temperature higher than or equal to 100°

C. and lower than a maximum temperature in the first heat treatment,

wherein the oxide semiconductor layer is at least partially microcrystalline,

wherein a protective layer is formed on and in contact with the oxide semiconductor layer, in a region comprised between the source electrode layer and the drain electrode layer and in regions overlapping with the source and the drain electrode layers, and

wherein the source and the drain electrode layers are formed over the protective layer.

18. The method for manufacturing a semiconductor device according to claim 17, wherein the oxide semiconductor layer has a degree of crystallization of 80% or more.

19. The method for manufacturing a semiconductor device according to claim 17, wherein the first heat treatment is performed in a nitrogen atmosphere or a rare gas atmosphere.

20. The method for manufacturing a semiconductor device according to claim 17, wherein the first heat treatment is performed under a condition that the maximum temperature in the first heat treatment is higher than or equal to 350°

C. and lower than or equal to 750°

C.

21. The method for manufacturing a semiconductor device according to claim 17, wherein the first heat treatment is performed under a condition that the maximum temperature in the first heat treatment is higher than 450°

C. and lower than or equal to 750°

C.

22. The method for manufacturing a semiconductor device according to claim 17, further comprising a preliminary heat treatment performed after the step of forming the gate insulating layer and before the step of forming the oxide semiconductor layer, at a temperature higher than or equal to 400°

C. and lower than a strain point of the substrate,

wherein the preliminary heat treatment is performed in an inert atmosphere.

23. The method for manufacturing a semiconductor device according to claim 17, further comprising a preliminary heat treatment performed after the step of forming the gate insulating layer and before the step of forming the oxide semiconductor layer, at a temperature higher than or equal to 400°

C. and lower than a strain point of the substrate.

24. The method for manufacturing a semiconductor device according to claim 17,

wherein the inorganic insulating layer comprises a first sublayer and a second sublayer, the second sublayer being located over the first sublayer,

wherein the first sublayer comprises oxygen and at least one of silicon and nitrogen, and

wherein the second sublayer comprises aluminum.

25. The method for manufacturing a semiconductor device according to claim 17, wherein outer side edges of the gate electrode layer extend beyond outer side edges of the oxide semiconductor layer.

26. The method for manufacturing a semiconductor device according to claim 17, wherein the semiconductor device is one of a liquid crystal display device and an electrophoretic display device.

27. The method for manufacturing a semiconductor device according to claim 17, wherein the resin material is one of a polyimide, an acrylic resin, a benzocyclobutene-based resin, a polyamide, and an epoxy resin.

28. The method for manufacturing a semiconductor device according to claim 17, wherein a cross-section view showing the oxide semiconductor layer and the source and the drain electrode layers shows that the protective layer does not extend beyond lateral boundaries of the gate electrode layer.

29. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode layer over a substrate having an insulating surface;

forming a gate insulating layer over the gate electrode layer;

forming an In—

Ga—

Zn—

O-based oxide semiconductor layer by sputtering over the gate insulating layer, wherein the substrate is heated at a temperature higher than or equal to 400°

C. and lower than or equal to 700°

C. during the sputtering;

performing a first heat treatment after the oxide semiconductor layer is formed;

forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer after performing the first heat treatment;

forming an inorganic insulating layer over the gate insulating layer, the oxide semiconductor layer, and the source and the drain electrode layers;

performing a second heat treatment after the inorganic insulating layer is formed; and

forming a planarization layer comprising a resin material over the inorganic insulating layer,

wherein an amount of change in threshold voltage according to a BT test applied to a transistor including the oxide semiconductor layer is less than or equal to 2 V,

wherein the BT test is performed under conditions in which a temperature of the substrate is 150°

C., an electrical field applied to the gate insulating layer is 2 MV/cm, and a time of application of the electrical field is one hour,

wherein the second heat treatment is performed at a temperature higher than or equal to 100°

C. and lower than a maximum temperature in the first heat treatment, and

wherein the oxide semiconductor layer is at least partially microcrystalline,

wherein a protective layer is formed on and in contact with the oxide semiconductor layer, in a region comprised between the source electrode layer and the drain electrode layer and in regions overlapping with the source and the drain electrode layers, and

wherein the source and the drain electrode layers are formed over the protective layer.

30. The method for manufacturing a semiconductor device according to claim 29, wherein the amount of change in threshold voltage according to the BT test is less than or equal to 1.5 V.

31. The method for manufacturing a semiconductor device according to claim 29, wherein the amount of change in threshold voltage according to the BT test is less than or equal to 1.0 V.

32. The method for manufacturing a semiconductor device according to claim 29, wherein the oxide semiconductor layer has a degree of crystallization of 80% or more.

33. The method for manufacturing a semiconductor device according to claim 29, wherein the first heat treatment is performed in a nitrogen atmosphere or a rare gas atmosphere.

34. The method for manufacturing a semiconductor device according to claim 29, wherein the second heat treatment is performed in an air atmosphere, an oxygen atmosphere, a nitrogen atmosphere, or a rare gas atmosphere.

35. The method for manufacturing a semiconductor device according to claim 29, wherein the first heat treatment is performed under a condition that the maximum temperature in the first heat treatment is higher than or equal to 350°

C. and lower than or equal to 750°

C.

36. The method for manufacturing a semiconductor device according to claim 29 further comprising:

performing a preheat treatment before forming the oxide semiconductor layer by sputtering.

37. The method for manufacturing a semiconductor device according to claim 29, wherein outer side edges of the gate electrode layer extend beyond outer side edges of the oxide semiconductor layer.

38. The method for manufacturing a semiconductor device according to claim 29, wherein the semiconductor device is one of a liquid crystal display device and an electrophoretic display device.

39. The method for manufacturing a semiconductor device according to claim 29, wherein the resin material is one of a polyimide, an acrylic resin, a benzocyclobutene-based resin, a polyamide, and an epoxy resin.

40. The method for manufacturing a semiconductor device according to claim 29, wherein a cross-section view showing the oxide semiconductor layer and the source and the drain electrode layers shows that the protective layer does not extend beyond lateral boundaries of the gate electrode layer.

41. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode layer over a substrate having an insulating surface;

forming a gate insulating layer over the gate electrode layer;

forming an In—

Ga—

Zn—

O-based oxide semiconductor layer by sputtering over the gate insulating layer, wherein the substrate is heated at a temperature higher than or equal to 400°

C. and lower than or equal to 700°

C. during the sputtering;

performing a first heat treatment after the oxide semiconductor layer is formed;

forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer after performing the first heat treatment;

forming an inorganic insulating layer over the gate insulating layer, the oxide semiconductor layer, and the source and the drain electrode layers;

performing a second heat treatment after the inorganic insulating layer is formed; and

forming a planarization layer comprising a resin material over the inorganic insulating layer,

wherein the second heat treatment is performed at a temperature higher than or equal to 100°

C. and lower than a maximum temperature in the first heat treatment, and

wherein the oxide semiconductor layer is at least partially microcrystalline,

wherein a protective layer is formed on and in contact with the oxide semiconductor layer, in a region comprised between the source electrode layer and the drain electrode layer and in regions overlapping with the source and the drain electrode layers, and

wherein the source and the drain electrode layers are formed over the protective layer.

42. The method for manufacturing a semiconductor device according to claim 41, wherein the oxide semiconductor layer has a degree of crystallization of 80% or more.

43. The method for manufacturing a semiconductor device according to claim 41, wherein the first heat treatment is performed in a nitrogen atmosphere or a rare gas atmosphere.

44. The method for manufacturing a semiconductor device according to claim 41, wherein the second heat treatment is performed in an air atmosphere, an oxygen atmosphere, a nitrogen atmosphere, or a rare gas atmosphere.

45. The method for manufacturing a semiconductor device according to claim 41, wherein the first heat treatment is performed under a condition that the maximum temperature in the first heat treatment is higher than or equal to 350°

C. and lower than or equal to 750°

C.

46. The method for manufacturing a semiconductor device according to claim 41 further comprising:

performing a preheat treatment before forming the oxide semiconductor layer by sputtering.

47. The method for manufacturing a semiconductor device according to claim 41, wherein the semiconductor device is one of a liquid crystal display device and an electrophoretic display device.

48. The method for manufacturing a semiconductor device according to claim 41, wherein the resin material is one of a polyimide, an acrylic resin, a benzocyclobutene-based resin, a polyamide, and an epoxy resin.

49. The method for manufacturing a semiconductor device according to claim 41, wherein a cross-section view showing the oxide semiconductor layer and the source and the drain electrode layers shows that the protective layer does not extend beyond lateral boundaries of the gate electrode layer.