Two differential amplifier configuration

• US 9,595,931 B2
• Filed: 12/12/2014
• Issued: 03/14/2017
• Est. Priority Date: 09/12/2014
• Status: Active Grant

• Current Assignee: ESS Technology Incorporated (Semiconductor Holding Corp.)
• Original Assignee: ESS Technology Incorporated (Semiconductor Holding Corp.)
• Inventors: Mallinson, A. Martin
• Primary Examiner(s): Choe, Henry
• Application Number:
  US14/569,079
• Publication Number:
  US 20160079943A1
• Time in Patent Office: 823 Days
• Field of Search: 330/69, 330/260, 330/99, 330/104
• US Class Current: 1/1
• CPC Class Codes: H03F 1/0205 in transistor amplifiers
• CPC Class Codes: H03F 1/34 Negative-feedback-circuit arrangements with or without positive feedback H03F1/02 - H03F1/30, H03F1/38 - H03F1/50, H03F3/50 take precedence ; for rejection of common mode signals H03F3/45479
• CPC Class Codes: H03F 2200/09 A balun, i.e. balanced to or from unbalanced converter, being present at the output of an amplifier
• CPC Class Codes: H03F 2203/45114 the differential amplifier contains another differential amplifier in its feedback circuit
• CPC Class Codes: H03F 2203/45116 Feedback coupled to the input of the differential amplifier
• CPC Class Codes: H03F 2203/45138 Two or more differential amplifiers in IC-block form are combined, e.g. measuring amplifiers
• CPC Class Codes: H03F 2203/45224 One output of the differential amplifier being taken into consideration
• CPC Class Codes: H03F 2203/45336 the AAC comprising one or more resistors as feedback circuit elements
• CPC Class Codes: H03F 2203/45416 the CMCL comprising no addition of the dif signals to produce a common mode signal
• CPC Class Codes: H03F 2203/45446 there are two or more CMCLs
• CPC Class Codes: H03F 2203/45521 the FBC comprising op amp stages, e.g. cascaded stages of the dif amp and being coupled between the LC and the IC
• CPC Class Codes: H03F 2203/45528 the FBC comprising one or more passive resistors and being coupled between the LC and the IC
• CPC Class Codes: H03F 2203/45594 the IC comprising one or more resistors, which are not biasing resistor
• CPC Class Codes: H03F 3/45076 characterised by the way of implementation of the active amplifying circuit in the differential amplifier
• CPC Class Codes: H03F 3/45475 using IC blocks as the active amplifying circuit
• CPC Class Codes: H03F 3/45941 Controlling the input circuit of the differential amplifier
• CPC Class Codes: H03F 3/4595 by using feedforward means H03F3/45968 takes precedence

Abstract

An apparatus is disclosed for providing a common mode voltage to the inputs of a first differential amplifier which outputs the difference between two signals. A second differential amplifier receives the output of the first differential amplifier, and the output of the second differential amplifier is fed back to the inputs of the first differential amplifier as a common mode voltage. Since both inputs of the first differential amplifier receive the fed back common mode voltage, the first differential amplifier still outputs only the difference in the two signals, but the presence of the common mode voltage allows the first differential amplifier to operate with lower noise if the voltage levels of the inputs to the first differential amplifier vary. The second differential amplifier may be of significantly lower quality and cost than the first differential amplifier, without affecting the performance of the first differential amplifier.

Claims

1. A circuit comprising:

a first differential amplifier, comprising;

a first operational amplifier having an inverting input for receiving a first part of a differential signal represented by the difference between two voltages and a non-inverting input for receiving a second part of the differential signal, and an output for outputting a single ended signal representing the difference between the two parts of the differential signal;

a first resistor coupled to the output of the first operational amplifier and the inverting input of the first operational amplifier so as to create a negative feedback loop around the first operational amplifier; and

a second resistor coupled to the non-inverting input of the first operational amplifier and to a ground;

a second differential amplifier, comprising;

a second operational amplifier having an inverting input and a non-inverting input, the non-inverting input coupled to the ground;

a third resistor coupled to the output of the first operational amplifier and to the inverting input of second operational amplifier; and

a fourth resistor coupled to the output of the second operational amplifier and the inverting input of the second operational amplifier so as to create a negative feedback loop around the second operational amplifier;

a fifth resistor coupled to the output of the second operational amplifier and the inverting input of the first operational amplifier in a first feedback loop; and

a sixth resistor coupled to the output of the second operational amplifier and the non-inverting input of the first operational amplifier in a second feedback loop which is independent of the first feedback loop.

2. The circuit of claim 1 wherein each operational amplifier has an equivalent noise resistance, and the equivalent noise resistance of the second operational amplifier is significantly greater than the equivalent noise resistance of the first operational amplifier.

3. The circuit of claim 2 wherein the equivalent noise resistance of the second operational amplifier is more than 10 times the equivalent noise resistance of the first operational amplifier.

4. The circuit of claim 1 wherein the first and second resistors have resistances substantially equal to each other.

5. The circuit of claim 1 wherein the third and fourth resistors have resistances substantially equal to each other.

6. The circuit of claim 1 wherein the fifth and sixth resistors have resistances substantially equal to each other.

7. The circuit of claim 4 wherein the fifth and sixth resistors have resistances substantially equal to twice the resistances of the first and second resistors.

8. A circuit comprising:

a first differential amplifier having an inverting input for receiving a first part of a differential signal represented by the difference between two voltages and a non-inverting input for receiving a second part of the differential signal, and an output for outputting a single ended signal representing the difference between the two parts of the differential signal;

a second differential amplifier having an inverting input coupled to the output of the first differential amplifier and a non-inverting input coupled to the ground;

a first resistor coupled to the output of the second differential amplifier and the inverting input of the first differential amplifier in a first feedback loop; and

a second resistor coupled to the output of the second differential amplifier and the non-inverting input of the first differential amplifier in a second feedback loop which is independent of the first feedback loop.

9. The circuit of claim 8 wherein each differential amplifier has an equivalent noise resistance, and the equivalent noise resistance of the second differential amplifier is significantly greater than the equivalent noise resistance of the first differential amplifier.

10. The circuit of claim 9 wherein the equivalent noise resistance of the second differential amplifier is more than 10 times the equivalent noise resistance of the first differential amplifier.

11. The circuit of claim 8 wherein the first and second resistors have resistances substantially equal to each other.