Cross point switch
First Claim
Patent Images
1. A circuit, comprising:
- an input node operable to receive an input signal;
an output node;
an enable circuit operable to receive an enable signal;
a first drive circuit coupled to the input node, the enable circuit, and the output node; and
a second drive circuit coupled to the input node, the enable circuit, and the output node, wherein if the enable signal is in a first state, one of the first drive circuit or the second drive circuit is operable for a period of time to drive at the output node a signal that represents the input signal, wherein the period of time terminates independently of the input signal, and wherein if the enable signal is in a second state, the output node is operable in an impedance state.
3 Assignments
0 Petitions
Accused Products
Abstract
A cross point switch, in accordance with one embodiment, includes a plurality of tri-state repeaters coupled to form a plurality of multiplexers. Each set of corresponding tri-state repeaters in the plurality of multiplexers share a front end module such that delay through the cross point switch due to input capacitance is reduced as compared to conventional cross point switches.
-
Citations
20 Claims
-
1. A circuit, comprising:
-
an input node operable to receive an input signal; an output node; an enable circuit operable to receive an enable signal; a first drive circuit coupled to the input node, the enable circuit, and the output node; and a second drive circuit coupled to the input node, the enable circuit, and the output node, wherein if the enable signal is in a first state, one of the first drive circuit or the second drive circuit is operable for a period of time to drive at the output node a signal that represents the input signal, wherein the period of time terminates independently of the input signal, and wherein if the enable signal is in a second state, the output node is operable in an impedance state. - View Dependent Claims (2, 3, 4, 5, 6)
-
-
7. A circuit, comprising:
-
an input node operable to receive an input signal; an output node; an enable circuit operable to receive an enable signal; a first means for driving coupled to the input node, the enable circuit, and the output node; and a second means for driving coupled to the input node, the enable circuit, and the output node, wherein if the enable signal is in a first state, one of the first means for driving or the second means for driving is operable for a period of time to drive at the output node a signal that represents the input signal, wherein the period of time terminates independently of the input signal, and wherein if the enable signal is in a second state, the output node is operable in an impedance state. - View Dependent Claims (8, 9, 10, 11, 12)
-
-
13. A circuit, comprising:
-
an enable circuit operable to receive an enable signal; an up drive circuit coupled to the enable circuit; and a down drive circuit coupled to the enable circuit, wherein if the enable signal is in a first state, one of the up drive circuit or the down drive circuit is operable for a period of time to drive a signal that represents an input signal, wherein the period of time terminates independently of the input signal, and wherein if the enable signal is in a second state, the circuit is operable in an impedance state. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20)
-
Specification