Circuit for and method of enabling the adaptation of an automatic gain control circuit

• US 9,595,990 B1
• Filed: 05/18/2016
• Issued: 03/14/2017
• Est. Priority Date: 05/18/2016
• Status: Active Grant

• Current Assignee: Xilinx, Inc. (Advanced Micro Devices, Inc.)
• Original Assignee: Xilinx, Inc. (Advanced Micro Devices, Inc.)
• Inventors: Zhang, Hongtao, Zhang, Geoffrey
• Primary Examiner(s): Ha, Dac
• Application Number:
  US15/158,420
• Time in Patent Office: 300 Days
• US Class Current: 1/1
• CPC Class Codes: H03G 3/3078 Circuits generating control signals for digitally modulated signals
• CPC Class Codes: H04L 25/03057 with a recursive structure H04L25/03031 takes precedence
• CPC Class Codes: H04L 25/03885 adaptive

Abstract

A circuit for enabling an adaptation of an automatic gain control circuit comprises an automatic gain control (ACG) circuit configured to receive an input signal and to generate a boosted input signal. An average peak signal magnitude adaptation circuit is configured to receive an output of a decision circuit and to generate an average peak signal magnitude. An average peak signal target calculation circuit is configured to receive the average peak signal magnitude and detected peak signal magnitudes, wherein the average peak signal magnitude adaptation circuit generates a target peak signal magnitude. An AGC adaptation circuit is configured to receive an average peak signal magnitude and the target peak signal magnitude, wherein the AGC adaptation circuit provides an AGC control signal to the AGC circuit to maximize the effective signal magnitude within an acceptable linearity range.

Claims

1. A circuit for enabling an adaptation of automatic gain control (AGC), the circuit comprising:

an automatic gain control circuit configured to receive an input signal and to generate a boosted input signal;

an equalization circuit configured to receive the boosted input signal generated by the automatic gain control circuit and to generate an equalized input signal;

a decision circuit configured to receive the equalized input signal, wherein the decision circuit generates decision outputs based upon the equalized input signal;

an average peak signal magnitude adaptation circuit configured to receive an output of the decision circuit and to generate an average peak signal magnitude;

an average peak signal target calculation circuit configured to receive the average peak signal magnitude and a maximum peak signal amplitude, wherein the average peak signal magnitude adaptation circuit generates a target average peak signal magnitude; and

an AGC adaptation circuit configured to receive an average peak signal magnitude and the target average peak signal magnitude, wherein the AGC adaptation circuit provides an AGC control signal to the AGC circuit to maximize the input signal magnitude within an acceptable linearity range.

2. The circuit of claim 1 wherein the AGC adaptation circuit maximizes the input signal magnitude within an acceptable linearity range by adapting the average peak signal magnitude based on a channel insertion loss.

3. The circuit of claim 1 further comprising an analog-to-digital converter circuit configured to receive the boosted input signal, wherein the AGC adaptation circuit maximizes the input signal magnitude within an ADC full scale range.

4. The circuit of claim 1 further comprising an equalization adaptation circuit configured to receive an output of the decision circuit, wherein output of the decision circuit is normalized to a signal without amplitude information.

5. The circuit of claim 1 wherein the equalization circuit comprises a decision feedback equalizer, the circuit further comprising an equalizer adaptation circuit that provides the pulse response back to the decision feedback equalizer.

6. The circuit of claim 5 wherein an average peak signal target calculation circuit selects a target average peak signal magnitude based upon a circuit linear range of the decision outputs.

7. The circuit of claim 1 wherein the equalization circuit comprises a feedforward equalizer, the circuit further comprising an equalizer adaptation circuit that provides equalizer coefficients back to the feedforward equalizer.

8. The circuit of claim 7 further comprising an analog-to-digital converter circuit, wherein an average peak signal target calculation circuit selects a target average peak signal magnitude based upon an ADC full scale range.

9. The circuit of claim 1 wherein the equalization circuit comprises a decision feedback equalizer and feedforward equalizer.

10. The circuit of claim 1 wherein the AGC adaptation circuit adjusts an AGC gain of the AGC circuit based upon a comparison of the average peak signal magnitude output and the target average peak signal magnitude.

11. A method of enabling an adaptation of automatic gain control, the method comprising:

receiving an input signal;

generating a boosted input signal based upon the received input signal;

generating an equalized signal based upon the boosted input signal;

generating decision outputs based upon the boosted input signal;

determining an average peak signal magnitude based upon the decision outputs;

determining a target peak signal magnitude based upon the average peak signal magnitude and a maximum peak signal amplitude; and

maximizing a signal magnitude of the input signal within an acceptable linearity range based upon the average peak signal magnitude and the target average peak signal magnitude.

12. The method of claim 11 wherein maximizing a signal magnitude of the input signal within an acceptable linearity range is performed by adapting the average peak signal magnitude based on a channel insertion loss.

13. The method of claim 11 further comprising configuring an analog-to-digital converter circuit to receive the boosted input signal, and maximizing the signal magnitude of the input signal within an ADC full scale range.

14. The method of claim 11 further comprising normalizing the decision outputs to a signal without amplitude information.

15. The method of claim 11 further comprising implementing a decision feedback equalizer adaptation circuit to provide the pulse response back to the decision feedback equalizer.

16. The method of claim 15 further comprising selecting a target average peak signal magnitude based upon a circuit linear range.

17. The method of claim 11 further comprising enabling adaptation of an equalizer circuit by providing equalizer coefficients back to an equalizer circuit.

18. The method of claim 17 further comprising selecting a target average peak signal magnitude based upon an ADC full scale range.

19. The method of claim 11 further comprising providing decision feedback equalization and feedforward equalization.

20. The method of claim 11 further comprising adjusting the AGC gain based upon a comparison of the average peak signal magnitude and the target average peak signal magnitude.