Nonvolatile memory device and driving method thereof
First Claim
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1. A nonvolatile memory device, comprising:
- a plurality of strings in a direction perpendicular to a substrate, wherein each string includes at least one string selection transistor, a plurality of memory cells arranged in a plurality of word lines and a plurality of bit lines, and at least one ground selection transistor in series; and
a control logic configured to perform a program operation for setting a threshold voltage of at least one of the at least one string selection transistor and the at least one ground selection transistor,wherein the program operation is performed when an erase cycle number reaches a reference value.
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Abstract
According to example embodiments, a nonvolatile memory device includes a plurality of strings having a plurality of serially-connected selection transistors and a plurality of memory cells connected in series to one end of the serially-connected selection transistors. A control logic is configured to perform a program operation for setting a threshold voltage of at least one of the serially-connected selection transistors.
46 Citations
20 Claims
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1. A nonvolatile memory device, comprising:
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a plurality of strings in a direction perpendicular to a substrate, wherein each string includes at least one string selection transistor, a plurality of memory cells arranged in a plurality of word lines and a plurality of bit lines, and at least one ground selection transistor in series; and a control logic configured to perform a program operation for setting a threshold voltage of at least one of the at least one string selection transistor and the at least one ground selection transistor, wherein the program operation is performed when an erase cycle number reaches a reference value. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A storage device, comprising:
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a plurality of strings including a plurality of serially-connected selection transistors and a plurality of memory cells connected in series to one end of the plurality of serially-connected selection transistors, at least two strings of the plurality of strings being connected to a bit line, each of the at least two strings of the plurality of strings including a first string and a second string, the first string including a first enhancement type selection transistor connected to the bit line and a first depletion type selection transistor connected to the first enhancement type selection transistor, the second string including a second depletion type selection transistor connected to the bit line and a second enhancement type selection transistor connected to the second depletion type selection transistor, each of the first and second enhancement type selection transistors and the first and second depletion type selection transistors including at least two selection transistors having a structure that is the same as a structure of each of the plurality of memory cells; and a controller configured to perform a program operation for setting a threshold voltage of at least one of the plurality of serially-connected selection transistors, wherein the program operation is performed when an erase cycle number reaches a reference value. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18)
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19. A method for operating a storage device comprising at least one nonvolatile memory device having a plurality of strings in a direction perpendicular to a substrate, wherein each string includes at least one selection transistor, a plurality of memory cells arranged in a plurality of word lines and a plurality of bit lines, and at least one ground selection transistor in series;
- and a memory controller configured to control the at least one nonvolatile memory, device, the method comprising;
generating a program command when an erase cycle number reaches a reference value; and setting a threshold voltage of at least one of the at least one string selection transistor and the at least one ground selection transistor. - View Dependent Claims (20)
- and a memory controller configured to control the at least one nonvolatile memory, device, the method comprising;
Specification