Stacked half-bridge package

• US 9,601,418 B2
• Filed: 03/13/2014
• Issued: 03/21/2017
• Est. Priority Date: 01/14/2011
• Status: Active Grant

• Current Assignee: Infineon Technologies Americas Corp. (Infineon Technologies AG)
• Original Assignee: Infineon Technologies Americas Corp. (Infineon Technologies AG)
• Inventors: Cho, Eung San, Cheah, Chuan, Sawle, Andrew N.
• Primary Examiner(s): Smith, Bradley K
• Assistant Examiner(s): GOODWIN, DAVID J
• Application Number:
  US14/209,569
• Publication Number:
  US 20140191337A1
• Time in Patent Office: 1,104 Days
• Field of Search: 257/666, 257/723, 257/724, 257/735, 257/686, 257/692, 438/728, 438/724, 438/726
• US Class Current: 1/1
• CPC Class Codes: H01L 2224/0603 Bonding areas having different sizes, e.g. different heights or widths
• CPC Class Codes: H01L 2224/37147 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/40095 Kinked
• CPC Class Codes: H01L 2224/40245 the item being metallic
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/49111 the connectors connecting two common bonding areas, e.g. Litz or braid wires
• CPC Class Codes: H01L 2224/73221 Strap and wire connectors
• CPC Class Codes: H01L 2224/83801 Soldering or alloying
• CPC Class Codes: H01L 2224/84801 Soldering or alloying
• CPC Class Codes: H01L 23/3107 the device being completely enclosed
• CPC Class Codes: H01L 23/49524 the additional leads being a tape carrier or flat leads
• CPC Class Codes: H01L 23/49562 for devices being provided for in H01L29/00
• CPC Class Codes: H01L 23/49575 Assemblies of semiconductor devices on lead frames
• CPC Class Codes: H01L 24/36 Structure, shape, material or disposition of the strap connectors prior to the connecting process
• CPC Class Codes: H01L 24/37 of an individual strap connector
• CPC Class Codes: H01L 24/40 of an individual strap connector
• CPC Class Codes: H01L 24/41 of a plurality of strap connectors
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/49 : of a plurality of wire connectors
• CPC Class Codes: H01L 24/84 : using a strap connector
• CPC Class Codes: H01L 25/074 : Stacked arrangements of non-apertured devices
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/1306 : Field-effect transistor [FET]
• CPC Class Codes: H01L 2924/13064 : High Electron Mobility Transistor [HEMT, HFET [heterostructure FET], MODFET]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/207 : Diameter ranges
• CPC Class Codes: H01L 2924/30107 : Inductance

Abstract

According to an exemplary embodiment, a stacked half-bridge package includes a control transistor having a control drain for connection to a high voltage input, a control source coupled to an output terminal, and a control gate for being driven by a driver IC. The stacked half-bridge package also includes a sync transistor having a sync drain for connection to the output terminal, a sync source coupled to a low voltage input, and a sync gate for being driven by the driver IC. A current carrying layer is situated on the sync drain; the control transistor and the sync transistor being stacked on one another, where the current carrying layer provides a high current connection between the sync drain and the control source.

Claims

1. A stacked half-bridge package comprising:

a control transistor having a control drain for connection to a high voltage input, a control source coupled to an output terminal, and a control gate;

a sync transistor having a sync drain for connection to said output terminal, a sync source coupled to a low voltage input, and a sync gate;

said control and sync transistors being stacked over one another, wherein a current carrying layer provides an electrical connection between said sync drain and said control source.

2. The stacked half-bridge package of claim 1, wherein an output terminal leadframe provides connection for said current carrying layer.

3. The stacked half-bridge package of claim 1, comprising a solderable front metal (SFM) situated on said current carrying layer.

4. The stacked half-bridge package of claim 1, wherein a control drain leadframe provides connection for said control drain.

5. The stacked half-bridge package of claim 1, wherein a conductive source clip provides'"'"' connection between said sync source and a sync source leadframe.

6. The stacked half-bridge package of claim 1, wherein a conductive source clip comprises a source clip leg that is of a thickness greater than that of said sync transistor.

7. The stacked half-bridge package of claim 1, wherein a conductive source clip comprises a source clip leg that is of a thickness greater than a combined thickness of said sync transistor and said current carrying layer.

8. The stacked half-bridge package of claim 1, wherein a conductive source clip comprises a source clip web that is connected to said sync source and including a source clip leg that is connected to a sync source leadframe.

9. The stacked half-bridge package of claim 1, wherein a conductive source clip is connected to said sync source at a topside of said stacked half-bridge package.

10. The stacked half-bridge package of claim 1, wherein respective bottom surfaces of a sync source leadframe, a control drain leadframe, and an output terminal leadframe are substantially flush with one another.

11. The stacked half-bridge package of claim 1, wherein at least one control gate bondwire provides electrical connection for said control gate.

12. The stacked half-bridge package of claim 1, wherein at least one control gate bondwire provides electrical connection between said control gate and a control gate leadframe.

13. The stacked half-bridge package of claim 1, wherein at least one sync gate bondwire provides electrical connection for said sync gate.

14. The stacked half-bridge package of claim 1, wherein at least one sync gate bondwire provides electrical connection between said sync gate and a sync gate leadframe.

15. The stacked half-bridge package of claim 1, wherein said sync source comprises a plurality of sync source pads.

16. The stacked half-bridge package of claim 1, wherein said control transistor has top and bottom surfaces, said control drain being on said bottom surface and said control source and said control gate being on said top surface.

17. The stacked half-bridge package of claim 1, wherein said sync transistor has top and bottom surfaces, said sync drain being on said bottom surface and said sync source and said sync gate being on said top surface.

18. The stacked half-bridge package of claim 1, wherein respective bottom surfaces of a sync source leadframe, a control drain leadframe, a sync gate leadframe, a control gate leadframe, and an output terminal leadframe are substantially flush with one another.

19. The stacked half-bridge package of claim 1, further comprising an output terminal leadframe that is of a thickness greater than that of a control drain leadframe.

20. The stacked half-bridge package of claim 1, further comprising an output terminal leadframe that is of a thickness greater than a combined thickness of a control drain leadframe and said control transistor.