Method of forming a component having wire bonds and a stiffening layer

• US 9,601,454 B2
• Filed: 09/10/2015
• Issued: 03/21/2017
• Est. Priority Date: 02/01/2013
• Status: Active Grant

• Current Assignee: Invensas Corporation
• Original Assignee: Invensas Corporation
• Inventors: Zhao, Zhijun, Alatorre, Roseann
• Primary Examiner(s): Sefer, A.
• Assistant Examiner(s): NGUYEN, DILINH P
• Application Number:
  US14/850,500
• Publication Number:
  US 20150380375A1
• Time in Patent Office: 558 Days
• Field of Search: 438/617, 438/124, 438/126, 438/127
• US Class Current: 1/1
• CPC Class Codes: H01L 21/56 Encapsulations, e.g. encapsulation layers, coatings
• CPC Class Codes: H01L 21/565 Moulds
• CPC Class Codes: H01L 2224/05568 the whole external layer protruding from the surface
• CPC Class Codes: H01L 2224/05573 Single external layer
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/16227 the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/45147 Copper (Cu) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48145 the bodies being stacked
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/49171 Fan-out arrangements
• CPC Class Codes: H01L 2224/73257 Bump and wire connectors
• CPC Class Codes: H01L 2224/78301 Capillary
• CPC Class Codes: H01L 2225/1023 the support being an insulating substrate
• CPC Class Codes: H01L 2225/1058 Bump or bump-like electrical connections, e.g. balls, pillars, posts
• CPC Class Codes: H01L 23/3128 : the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 23/3135 : Double encapsulation or coating and encapsulation
• CPC Class Codes: H01L 23/49811 : Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads H01L23/49827 takes precedence
• CPC Class Codes: H01L 23/5389 : the chips being integrally enclosed by the interconnect and support structures
• CPC Class Codes: H01L 24/16 : of an individual bump connector
• CPC Class Codes: H01L 24/43 : Manufacturing methods
• CPC Class Codes: H01L 24/45 : of an individual wire connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/49 : of a plurality of wire connectors
• CPC Class Codes: H01L 25/105 : the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/1815 : Shape
• CPC Class Codes: H01L 2924/19107 : off-chip wires
• CPC Class Codes: H01L 2924/2075 : larger or equal to 1 micron less than 10 microns
• CPC Class Codes: H01L 2924/20751 : larger or equal to 10 microns less than 20 microns
• CPC Class Codes: H01L 2924/20752 : larger or equal to 20 microns less than 30 microns
• CPC Class Codes: H01L 2924/20753 : larger or equal to 30 microns less than 40 microns
• CPC Class Codes: H01L 2924/20754 : larger or equal to 40 microns less than 50 microns
• CPC Class Codes: H01L 2924/20755 : larger or equal to 50 microns less than 60 microns

Abstract

Microelectronic components and methods forming such microelectronic components are disclosed herein. The microelectronic components may include a plurality of electrically conductive vias in the form of wire bonds extending from a bonding surface of a substrate, such as surfaces of electrically conductive elements at a surface of the substrate.

Claims

1. A method of forming a component, comprising:

forming a plurality of wire bonds, each having a first end bonded to a conductive element of a plurality of conductive elements at a surface of the component, wherein the wire bonds have second ends remote from the first ends, the wire bonds having lengths between their respective first and second ends;

forming a first layer covering a first portion of the length of each wire bond;

inserting the second ends of the wire bonds into a removable film;

then forming a second layer overlying the first layer and covering a second portion of the length of each wire bond; and

then removing the removable film from the wire bonds,

wherein the second ends of the wire bonds are uncovered by the second layer at a surface of the second layer above the first layer and remote from the first layer, and

wherein the first layer increases stiffness of the wire bonds.

2. The method of claim 1, wherein the first and second layers have different material properties.

3. The method of claim 1, wherein the forming of the first layer includes curing the first layer, and wherein the forming of the second layer occurs after the forming of the first layer.

4. The method of claim 3, wherein the first layer is a stiffening layer and the second layer is an encapsulation.

5. The method of claim 1, further comprising providing a raised region, prior to the forming of the first layer, such that the raised region at least partially contains a material of the first layer in at least one direction parallel to the surface of the component.

6. The method of claim 5, wherein the raised region is made of a different material than the first layer and the second layer.

7. The method of claim 1, wherein the removable film inhibits the second material from covering the second ends of the wire bonds.

8. The method of claim 1, wherein the first layer inhibits movement of the second ends of the wire bonds during the forming of the second layer.

9. The method of claim 1, wherein the first layer is made of a dielectric material.

10. The method of claim 9, wherein the first layer is stiffer and made of a different material than the second layer.

11. The method of claim 1, wherein the first layer covers at least 10% of the length of the wire bonds.

12. The method of claim 1, wherein the first layer covers at least 50 micrometers of the length of the wire bonds.

13. The method of claim 1, wherein each of the wire bonds is stitch bonded to one of the conductive elements.

14. The method of claim 1, wherein the wire bonds have bonding tool marks thereon adjacent the second ends of the wire bonds.

15. The method of claim 14, wherein the wire bonds are tapered in at least one direction adjacent the second ends of the wire bonds.

16. The method of claim 14, wherein the bonding tool mark is a ball-shaped region.

17. The method of claim 1, wherein the second ends of the wire bonds project away from the second layer at an angle of 65 to 90 degrees with respect to a plane defined by the surface of the second layer.